## Relations and Refinement in Circuit Design (1991)

Venue: | Proc. BCS FACS Workshop on Refinement, Workshops in Computing |

Citations: | 21 - 1 self |

### BibTeX

@INPROCEEDINGS{Jones91relationsand,

author = {Geraint Jones and Mary Sheeran},

title = {Relations and Refinement in Circuit Design},

booktitle = {Proc. BCS FACS Workshop on Refinement, Workshops in Computing},

year = {1991},

pages = {133--152},

publisher = {Springer-Verlag}

}

### Years of Citing Articles

### OpenURL

### Abstract

A language of relations and combining forms is presented in which to describe both the behaviour of circuits and the specifications which they must meet. We illustrate a design method that starts by selecting representations for the values on which a circuit operates, and derive the circuit from these representations by a process of refinement entirely within the language. Formal methods have always been used in circuit design. It would be unthinkable to attempt to design combinational circuits without using Boolean algebra. This means that circuit designers, unlike programmers, already use mathematical tools as a matter of course. It also means that we have a good basis on which to build higher level formal design methods. Encouraged by these observations, we have been investigating the application of formal program development techniques to circuit design. We view circuit design as the transformation of a program describing the required behaviour into an equivalent program that is s...

### Citations

1354 | Introduction to Functional Programming
- Bird
- 1998
(Show Context)
Citation Context ...terms of the relations already introduced apr ; lad = rdr s+ and [lad n ; \Theta2 n ] ; + = rdr n s+ Bird uses a slightly different formulation of Horner's rule to great effect in program development =-=[Bird88]-=-. Horner's rule and many similar skewing theorems are special cases of a very general theorem relating row and triangle. The theorem tells us how (row Q)$(rowR) and row(Q$ R) are related when Q and R ... |

221 | An introduction to the theory of lists - Bird - 1987 |

21 |
µFP: An algebraic VLSI design language
- Sheeran
- 1983
(Show Context)
Citation Context ...lar planar structures. In our earlier work on the design language ��FP, we modelled circuits as stream functions, and the ways that circuits are plugged together we modelled by higher-order functi=-=ons [Sheer84]-=-. These higher-order functions were chosen to have simple mathematical properties, giving a useful set of theorems for use in design by transformation. Unsurprisingly, the higher-order functions for b... |

19 | Designing circuits by calculation
- Jones
- 1990
(Show Context)
Citation Context ...cial cases of a very general theorem relating row and triangle. The theorem tells us how (row Q)$(rowR) and row(Q$ R) are related when Q and R satisfy certain conditions. It is discussed in reference =-=[Jones90]-=- where it is called the general skewing theorem, and will not take it any further here. An example of a consequence of the general skewing theorem is that ['; P ] ; Q ; [S; S] = [S; '] ; Q =) ['; tri ... |

17 | Computer-based tools for regular array design - Luk, Jones, et al. - 1989 |

16 |
Formalising Abstraction Mechanisms for Hardware Verification in Higher Order Logic
- Melham
- 1990
(Show Context)
Citation Context ...ound in references [Borr89, Chin89, Luk88, Simon89]. Conclusion Describing both abstraction relations and circuits in a uniform relational framework works well. This is also demonstrated in reference =-=[Mel89]-=- which presents various kinds of abstraction for hardware verification using Higher Order Logic, which is also relational. That we can use relations and their inverses allows us to start with a simple... |

16 |
Designing regular array architectures using higher order functions
- Sheeran
- 1985
(Show Context)
Citation Context ...1) + 2 n c The solution is c = 2 n \Gamma 2, so, possible choices for abs are bin n and csv n\Gamma1 , which can represent 0 to 2 n \Gamma2. Choosing bin n gives the multiplier described in reference =-=[Sheer85]-=-. Here we will choose csv n\Gamma1 and design a multiplier similar to that presented in reference [McCan82]. Assuming n ? 0, the specification is now [csv n\Gamma1 ; [bin n ; bin n ] ; \Theta] ; + ; +... |

12 | Timeless Truths about Sequential Circuits . Concurrent Computations: Algorithms, Architecture and
- Jones, Sheeran
- 1988
(Show Context)
Citation Context ...data values rather than as relations between streams of data values. Subsequent lifting to streams presents no problems and preserves the algebraic properties of the structural higher-order functions =-=[Jones88]-=-, so the sequential design follows immediately from the combinational design. The aim of this paper is to give a fairly gentle introduction to our calculus of relations and to show how it is used to d... |

10 | Deriving the fast Fourier algorithm by calculation
- Jones
- 1989
(Show Context)
Citation Context ...eveloping very rapidly -- have been used to perform many impressive program derivations. We have presented a derivation in the Bird-Meertens style of the fast Fourier transform from its specification =-=[Jones89]-=-. Oxford University Computing Laboratory, 11 Keble Road, Oxford OX1 3QD, England y Department of Computing Science, University of Glasgow, Glasgow G12 8QQ, Scotland 2 Our more recent work has been on ... |

10 | Relations + higher-order functions = hardware descriptions - Jones, Sheeran - 1987 |

7 |
Retiming and slowdown
- Sheeran
- 1988
(Show Context)
Citation Context ...nal and sequential circuits in a uniform framework. We transform sequential circuits in much the same way as a designer uses the laws of Boolean algebra to transform combinational circuits. Reference =-=[Sheer88]-=- discusses the use of relations to reason about time in sequential circuits. For simplicity, we often consider only combinational circuits: circuits can then be modelled as relations between data valu... |

5 | From specification to parametrised architectures - Luk, Jones - 1988 |

4 |
Completely iterative pipelined multiplier array suitable for VLSI design
- McCanny, McWhirter
- 1982
(Show Context)
Citation Context ...h can represent 0 to 2 n \Gamma2. Choosing bin n gives the multiplier described in reference [Sheer85]. Here we will choose csv n\Gamma1 and design a multiplier similar to that presented in reference =-=[McCan82]-=-. Assuming n ? 0, the specification is now [csv n\Gamma1 ; [bin n ; bin n ] ; \Theta] ; + ; + \Gamma1 ; [bin \Gamma1 n ; (\Theta2 n ) \Gamma1 ; csv \Gamma1 n\Gamma1 ] The first two steps are the same ... |

4 | Formal Verification of Multipliers - Simonis - 1989 |

3 | An array processor for video picture motion estimation - Bhandal, Considine, et al. - 1989 |

3 | Applied Formal Methods for Correct VLSI Design - Claesen - 1989 |

2 | Proving an on-line multiplier with OBJ and TACHE: a practical experience - Borrione, Salem |

2 | Verified synthesis functions for negabinary arithmetic hardware - Chin |

2 | Exploring designs by circuit transformation - Jones, Luk - 1987 |

2 | Meertens, Constructing a calculus of programs - T |

1 | Meertens, Algorithmics -- towards programming as a mathematical activity - T |