Abstract

this paper are preliminary and may change slightly in later versions. 2 putting instrumentation instructions in previously unused processor cycles. Instrumentation code that executes in unused cycles is effectively hidden. Program instrumentation has been used for many purposes, including performance measurement, computer architecture simulations, and software fault isolation and error detection. Although direct instrumentation typically incurs lower cost than alternative approaches, the increased program running time caused by instrumentation is occasionally a limiting factor and is always an annoyance. At one extreme, in parallel or real-time systems, instrumentation overhead can perturb system behavior by introducing time dilation. Even for less demanding applications, the cost of program profiling or error detection is currently too high for production codes. Previous instrumentation systems expended considerable effort to formulate efficient instrumentation code sequences [10], place them parsimoniously [1], and insert instrumentation without affecting a program's behavior [8]. However, few systems attempted to exploit instruction-level parallelism by scheduling the instrumentation code into a program. This paper describes a simple instruction scheduler that we added to the EEL program executable editing library [9]. We applied the scheduler to a common program instrumentation, which records a basic block's execution frequency with a four-instruction sequence. On the dual-issue hyperSPARC, scheduling hides 13--21% of the overhead of profiling the SPECINT benchmarks (compiled with the Sun Compiler) and 5-- 53% of the overhead from the SPECFP benchmarks (with one exception). The results on the 3-way SuperSPARC are similar, as scheduling hides 8--22% of the SPECINT ...

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