An Integrated Approach to Realistic Worst-Case Design Optimization of MOS Analog Circuits (1992)
| Venue: | Proc. 29th ACM/IEEE Design Automation Conference |
| Citations: | 4 - 3 self |
BibTeX
@INPROCEEDINGS{Dharchoudhury92anintegrated,
author = {A. Dharchoudhury and S. M. Kang},
title = {An Integrated Approach to Realistic Worst-Case Design Optimization of MOS Analog Circuits},
booktitle = {Proc. 29th ACM/IEEE Design Automation Conference},
year = {1992},
pages = {704--709}
}
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Abstract
In this paper we present a new integrated approach for the optimization of MOS analog circuit performances using realistic worst-case device parameter files, each corresponding to a performance measure. Nonlinear response surfaces are constructed for the performance measures of interest, and the worst-case device parameter files are identified by solving a set of suitably cast nonlinear programming problems. The worst-case files are shown to depend on the values of the designable parameters. An efficient method of incorporating this dependence during worst-case design optimization has been developed. This method enables the design of circuits with optimal performances and high parametric yields. Some illustrative analog circuit examples are given to demonstrate the application of the worst-case design optimization procedure. 1 Introduction The performances of MOS Integrated Circuits (IC), such as voltage gain and speed, are functions of two types of parameters [1]: (a) designable para...
Citations
| 295 | Empirical Model-Building and Response Surfaces - Box, Draper - 1987 |
| 5 | Statistical modeling of VLSI circuit performances - Yu, Kang, et al. - 1986 |
| 2 | Limit-parameters: The general solution of the worst-case problem for the linearized case - Muller-L - 1990 |
| 2 | Identification of correlated device model parameter values for worst-case circuit performance analysis - Dharchoudhury, Kang - 1992 |
