Towards Efficient Hardware for Spike-Processing Neural Networks

Towards Efficient Hardware for Spike-Processing Neural Networks (1995)

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by Axel Jahnke , Ulrich Roth , Heinrich Klar

Venue:	Proc. of the World Congress on Neural Networks
Citations:	13 - 5 self

BibTeX

@INPROCEEDINGS{Jahnke95towardsefficient,
    author = {Axel Jahnke and Ulrich Roth and Heinrich Klar},
    title = {Towards Efficient Hardware for Spike-Processing Neural Networks},
    booktitle = {Proc. of the World Congress on Neural Networks},
    year = {1995},
    pages = {460--463}
}

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Abstract

. We present the requirements for a neurocomputer for spike-processing neural networks. In a simulation study we investigated the performance of available hardware and showed, that there is still a need for a specific neurocomputer dedicated to the simulation of spike-processing networks. On the basis of our simulation study and an investigation of the features of spike-processing networks we analyses the requirements for the design of dedicated hardware. An efficient hardware architecture should contain an event-list module, a sender-oriented connection module and a number of fixed-point processing units. 1 Introduction Experimental results [1] [2] together with theoretical studies [3] [4] suggest that the time structure of neuronal spike trains is relevant in neuronal signal processing. The synchronized firing of neuronal assemblies could serve as a versatile and general mechanism for feature binding, pattern segmentation and figure/ground separation. This mechanism could also be u...

Citations

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