DMCA
Optimal Temporal Partitioning and Synthesis for Reconfigurable Architectures (1998)
| Venue: | IN PROC. OF THE DESIGN, AUTOMATION & TEST IN EUROPE |
| Citations: | 29 - 6 self |
BibTeX
@INPROCEEDINGS{Kaul98optimaltemporal,
author = {Meenakshi Kaul and Ranga Vemuri},
title = {Optimal Temporal Partitioning and Synthesis for Reconfigurable Architectures},
booktitle = {IN PROC. OF THE DESIGN, AUTOMATION & TEST IN EUROPE},
year = {1998},
pages = {389--396},
publisher = {}
}
Share
 |
 |
 |
 |
||
OpenURL
Abstract
We develop a 0-1 non-linear programming (NLP) model for combined temporal partitioning and highlevel synthesis from behavioral specifications destined to be implemented on reconfigurable processors. We present tight linearizations of the NLP model. We present effective variable selection heuristics for a branch and bound solution of the derived linear programming model. We show how tight linearizations combined with good variable selection techniques during branch and bound yield optimal results in relatively short execution times.
Keyphrases
reconfigurable architecture optimal temporal partitioning derived linear programming model bound solution 0-1 non-linear programming combined temporal partitioning present tight linearizations reconfigurable processor short execution time bound yield optimal result good variable selection technique present effective variable selection heuristic highlevel synthesis tight linearizations nlp model behavioral specification
