## Provably Correct Hardware Compilation using Timing Diagrams (1997)

Citations: | 2 - 0 self |

### BibTeX

@MISC{Schenke97provablycorrect,

author = {Michael Schenke and Michael Dossis},

title = {Provably Correct Hardware Compilation using Timing Diagrams},

year = {1997}

}

### OpenURL

### Abstract

In this article we present a framework within which hardware implementations are proven correct from specifications given in an OCCAM-like language called Handel by the use of a robust set of mathematical transformational laws. The semantical basis for Handel and its hardware implementations are simple functions of time which are called timing diagrams. This basis allows to denote the abstract properties of the Handel programs and hence the implementations in a modal logic, called Duration Calculus. The semantical treatment by one model for all three levels including the abstract properties, Handel and the level of gates, is one of the outstanding features of our approach. The delicate mathematical model which is used is able to cope with the complex form of parallelism used in Handel and with the detailed treatment of the relation between parallelism and timing. An immediate benefit of this approach is that Handel is a language already in use by hardware designers for spe...

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Citation Context ...e synthesis approach fertile for further exploitation and enhancement using formal techniques, such as the one presented in this paper. 2 Previous Work and Current Approach Programs written in Handel =-=[14]-=- specify hardware implementations. Although Handel programs resemble occam programs [9] a major difference concerns the use of the parallel operator: Like occam, Handel obeys to the possibility of a p... |