Programmable Active Memories: Reconfigurable Systems Come of Age

Programmable Active Memories: Reconfigurable Systems Come of Age (1996)

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by J. Vuillemin , P. Bertin , D. Roncin , M. Shand , H. Touati , P. Boucard

Venue:	IEEE Transactions on VLSI Systems
Citations:	123 - 5 self

BibTeX

@ARTICLE{Vuillemin96programmableactive,
    author = {J. Vuillemin and P. Bertin and D. Roncin and M. Shand and H. Touati and P. Boucard},
    title = {Programmable Active Memories: Reconfigurable Systems Come of Age},
    journal = {IEEE Transactions on VLSI Systems},
    year = {1996},
    volume = {4},
    pages = {56--69}
}

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Abstract

Programmable Active Memories (PAM) are a novel form of universal reconfigurable hardware co-processor. Based on Field-Programmable Gate Array (FPGA) technology, a PAM is a virtual machine, controlled by a standard microprocessor, which can be dynamically and indefinitely reconfigured into a large number of application-specific circuits. PAMs offer a new mixture of hardware performance and software versatility. We review the important architectural features of PAMs, through the example of DECPeRLe-1, an experimental device built in 1992. PAM programming is presented, in contrast to classical gate-array and full custom circuit design. Our emphasis is on large, code-generated synchronous systems descriptions

Citations

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