Abstract

We present a subjective review of custom cell generation methods in the context of future advances in state-of-the-art digital circuit synthesis. In particular, we describe three opportunities for coupling circuit optimization operations with the library development process. These operations include electrical optimization, technology mapping, and cell level place and route. 1.# Introduction Several methods have been developed in recent years for the automatic generation of cell libraries. This effort has been largely motivated by a need for alternatives to manual layout thereby reducing library development costs and time to market. The most common approaches are layout generators, re-compaction of existing libraries, and automatic cell synthesis. Procedural layout generators, which are either languagebased or interfaced with a symbolic layout system, are a means of capturing the layout design in a somewhat designrule independent fashion. This is useful in reducing the layout creati...

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