## A Register Allocation Framework Based on Hierarchical Cyclic Interval Graphs (1993)

Venue: | In International Workshop on Compiler Construction, Paderdorn |

Citations: | 56 - 12 self |

### BibTeX

@INPROCEEDINGS{Hendren93aregister,

author = {Laurie J. Hendren and Guang R. Gao and Erik R. Altman and Chandrika Mukerji},

title = {A Register Allocation Framework Based on Hierarchical Cyclic Interval Graphs},

booktitle = {In International Workshop on Compiler Construction, Paderdorn},

year = {1993},

pages = {176--191},

publisher = {Springer-Verlag}

}

### Years of Citing Articles

### OpenURL

### Abstract

In this paper, we propose the use of cyclic interval graphs as an alternative representation for register allocation. The "thickness" of the cyclic interval graph captures the notion of overlap between live ranges of variables relative to each particular point of time in the program execution. We demonstrate that cyclic interval graphs provide a feasible and effective representation that accurately captures the periodic nature of live ranges found in loops. A new heuristic algorithm for minimum register allocation, the fat cover algorithm, has been developed and implemented to exploit such program structure. In addition, a new spilling algorithm is proposed that makes use of the extra information available in the interval graph representation. These two algorithms work together to provide a two-phase register allocation process that does not require iteration of the spilling or coloring phases. We extend the notion of cyclic interval graphs to hierarchical cyclic interval graphs and we...

### Citations

3976 |
Computer Architecture – A Quantitative Approach
- Hennessy, Patterson
- 2003
(Show Context)
Citation Context ...tion. In fact, for modern high-performance processor architectures, register allocation has been viewed as a technique which "adds the largest single improvement" among various compiler opti=-=mizations [1]-=-. The technology advance in the past decade has widened the gap between the speed of the CPU and memory (DRAMs), and this gap (a form of the Von Neumann bottleneck) is expected to continue to grow [2]... |

417 |
Register allocation & spilling via graph coloring
- Chaitin
- 1982
(Show Context)
Citation Context ...of good register allocation strategies is also increasing. Register allocators in many modern compilers employ the classical graph coloring method originally proposed by Chaitin and improved by others=-=[3, 4, 5, 6]-=-. In this method, an interference graph is built to direct register allocation. Each node in the graph corresponds to a live range of a program variable. An edge between two nodes in the graph represe... |

226 |
Dependence Graphs and Compiler Optimization
- Kuck, Kuhn, et al.
- 1981
(Show Context)
Citation Context ...the original program [22]. The objective of their work is to allocate storage for temporary variables by renaming, which is a compiler technique that transforms imperative programs to dataflow graphs =-=[23, 24]-=-. They have pointed out that the formulation of the register allocation problem as a graph coloring problem based on the traditional interference graph may abstract away vital information present in t... |

193 |
Register allocation via coloring
- Chaitin, Auslander, et al.
- 1981
(Show Context)
Citation Context ...of good register allocation strategies is also increasing. Register allocators in many modern compilers employ the classical graph coloring method originally proposed by Chaitin and improved by others=-=[3, 4, 5, 6]-=-. In this method, an interference graph is built to direct register allocation. Each node in the graph corresponds to a live range of a program variable. An edge between two nodes in the graph represe... |

161 |
J.Henessy, "The Priority-based Coloring approach to register allocation
- Chow
- 1990
(Show Context)
Citation Context ...sult in a k-colorable interference graph in one pass, and it is necessary to iterate the coloring/spilling process until a k-colorable solution is found. It should be noted that the approach given in =-=[13]-=- suggested a means of avoiding this iteration, but it uses a more complex algorithm than that required here. Choice of spilled quantities: We use the information stored in the cyclic interval graph to... |

133 |
Coloring heuristics for register allocation
- Briggs, Cooper, et al.
- 1989
(Show Context)
Citation Context ...of good register allocation strategies is also increasing. Register allocators in many modern compilers employ the classical graph coloring method originally proposed by Chaitin and improved by others=-=[3, 4, 5, 6]-=-. In this method, an interference graph is built to direct register allocation. Each node in the graph corresponds to a live range of a program variable. An edge between two nodes in the graph represe... |

123 |
Dataflow supercomputers
- Dennis
- 1980
(Show Context)
Citation Context ...the original program [22]. The objective of their work is to allocate storage for temporary variables by renaming, which is a compiler technique that transforms imperative programs to dataflow graphs =-=[23, 24]-=-. They have pointed out that the formulation of the register allocation problem as a graph coloring problem based on the traditional interference graph may abstract away vital information present in t... |

123 |
Automatic synthesis of data paths in digital systems
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- 1986
(Show Context)
Citation Context ...work has been done, a good summary of which may be found in [28, 29]. Using circular arc graphs for register allocation has recently been proposed in high-level dataflow synthesis for digital systems =-=[30, 31, 32]-=-. In this application domain, the computation is represented by data flow graphs. Data flow graphs with loops can be modeled by cyclic dataflow graphs [33, 34], and the corresponding register allocati... |

115 |
The complexity of coloring circular arcs and chords
- Garey, Johnson, et al.
- 1980
(Show Context)
Citation Context ...two problems are treated in Section 3 and Section 4 respectively. 6 2.4 Further Observations about Cyclic Interval Graphs Our problems are related to the class of circular-arc graph coloring problems =-=[11, 12]-=-. A graph G is called a circular-arc graph if its vertices can be placed in a one-to-one correspondence with a set of circular arcs of a circle in such a way that two vertices of G are joined by an ed... |

96 |
Register Allocation by Priority-based Coloring
- Chow, Hennessy
- 1984
(Show Context)
Citation Context |

95 | Register allocation via hierarchical graph coloring
- Callahan, Koblenz
- 1991
(Show Context)
Citation Context ...r recoloring the lower level with some extra initial coloring constraints. As we shall briefly survey in Section 7, interesting work has been conducted on hierarchical methods for register allocation =-=[15, 16, 17]-=-. However, it is our belief that the clear and simple representation of the cyclic interval graph provides a good basis for representing live ranges that cross the boundaries of nested program structu... |

86 |
a program for register allocation
- Kurdahi, Parker
- 1987
(Show Context)
Citation Context ...work has been done, a good summary of which may be found in [28, 29]. Using circular arc graphs for register allocation has recently been proposed in high-level dataflow synthesis for digital systems =-=[30, 31, 32]-=-. In this application domain, the computation is represented by data flow graphs. Data flow graphs with loops can be modeled by cyclic dataflow graphs [33, 34], and the corresponding register allocati... |

76 |
Minimizing Register Usage Penalty at Procedure Calls
- Chow
(Show Context)
Citation Context ...ter pipeline. Eisenbeis et.al.proposed a method based on cyclic scheduling for optimizing register usage on the Cray-2 [19]. Interprocedural register allocation has been studied by a number of people =-=[20, 10, 21]-=-. For example, Steenkiste and Hennessy have developed an algorithm for interprocedural register 29 allocation where a procedure interference graph is constructed. Each node in the graph is a procedure... |

75 |
Coloring a family of circular arcs
- TUCKER
- 1975
(Show Context)
Citation Context ... phase is only invoked once, and there is no need for iterating the allocation and spilling phases.(Section 4) The possibility of using interval graphs as a model for register allocation was noted in =-=[7, 8]-=-. However, to our knowledge, previous research was theoretical in nature and mainly focussed on the algorithmic aspects of the interval graph model. Furthermore, the issues of applying such models to ... |

71 |
Computer technology and architecture: An evolving interaction
- Hennessy, Jouppi
- 1991
(Show Context)
Citation Context ...[1]. The technology advance in the past decade has widened the gap between the speed of the CPU and memory (DRAMs), and this gap (a form of the Von Neumann bottleneck) is expected to continue to grow =-=[2]-=-. Therefore, the benefit of keeping variables in registers is increasing, and thus the impact of good register allocation strategies is also increasing. Register allocators in many modern compilers em... |

64 |
Spill code minimization techniques for optimizing compliers
- Bernstein, Golumbic, et al.
- 1989
(Show Context)
Citation Context ...h representation, and therefore cannot be exploited in spilling techniques based on that representation. It should be noted that a similar approach has been used in the context of interference graphs =-=[14]. In this -=-approach the "width" 1 of the interference graph was used for one of the spill heuristics. Similarly our algorithm uses the width of the interval graph as 1 The width of the interference gra... |

61 | A Novel Framework of Register Allocation for Software Pipelining
- Ning, Gao
- 1993
(Show Context)
Citation Context ...e greater than 1. A straightforward extension can represent certain array references in a loop using cyclic intervals. A full discussion is beyond the scope of this paper, and readers are referred to =-=[9]-=-. Cyclic interval graphs can also be used to represent programs with hierarchical control structures such as nested loops and conditionals. In the case of nested loops, we naturally get nested cyclic ... |

58 |
What’s in a name? or the value of renaming for parallelism detection and storage allocation
- Cytron, Ferrante
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Citation Context ...tion phase. Cytron and Ferrante have proposed a method of storage allocation where the amount of storage needed is equal to the maximum number of simultaneously live variables in the original program =-=[22]-=-. The objective of their work is to allocate storage for temporary variables by renaming, which is a compiler technique that transforms imperative programs to dataflow graphs [23, 24]. They have point... |

46 |
Applied Combinatorics
- Tucker
- 1980
(Show Context)
Citation Context ... phase is only invoked once, and there is no need for iterating the allocation and spilling phases.(Section 4) The possibility of using interval graphs as a model for register allocation was noted in =-=[7, 8]-=-. However, to our knowledge, previous research was theoretical in nature and mainly focussed on the algorithmic aspects of the interval graph model. Furthermore, the issues of applying such models to ... |

45 | Designing the McCAT compiler based on a family of structured intermediate representations
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Citation Context ...al coloring testbed and our prototype spilling program, our register allocation framework is being integrated into the low-level structured intermediate representation supported by the McCAT compiler =-=[35]-=-. In addition to this implementation effort, we are continuing to exploit the extra information available from the interval graph representation. For example, one potential use of such information is ... |

36 |
Automatic storage optimization
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- 1979
(Show Context)
Citation Context ...He also noted that the related concept of circular arc graphs could be applied to program loops. Interval graphs have also been used to overlay arrays and thereby minimize program memory requirements =-=[25]-=-, and to perform channel routing in VLSI layouts [26, 27]. However, the practical use of interval graphs in register allocation appears to have been largely ignored because of perceived difficulties i... |

36 |
Knight “Scheduling and binding algorithm for high level synthesis”, proc. DAC
- Paulin, P
- 1989
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Citation Context ...taflow synthesis for digital systems [30, 31, 32]. In this application domain, the computation is represented by data flow graphs. Data flow graphs with loops can be modeled by cyclic dataflow graphs =-=[33, 34]-=-, and the corresponding register allocation problem can be modeled by circular arc graphs [34]. Unlike in compiler optimization, the hardware-oriented synthesis work traditionally does not address the... |

31 | Register allocation via clique separators
- Gupta, Soffa, et al.
- 1989
(Show Context)
Citation Context ...r recoloring the lower level with some extra initial coloring constraints. As we shall briefly survey in Section 7, interesting work has been conducted on hierarchical methods for register allocation =-=[15, 16, 17]-=-. However, it is our belief that the clear and simple representation of the cyclic interval graph provides a good basis for representing live ranges that cross the boundaries of nested program structu... |

29 |
A simple interprocedural register allocation algorithm and its effectiveness for lisp
- Steenkiste, Hennessy
- 1989
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Citation Context ...nimal number of registers to each procedure using such a solution. This reduces the amount of register saving required at procedure call time, and can also improve interprocedural register allocation =-=[10]-=-. 2. Using the information captured by interval graphs, we have developed a two-step approach for solving Problem 2. This approach makes effective use of the optimal solution of Problem 1 to minimize ... |

25 |
Trapezoid graphs and their coloring
- Dagan, Golumbic, et al.
- 1988
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Citation Context ...c graphs could be applied to program loops. Interval graphs have also been used to overlay arrays and thereby minimize program memory requirements [25], and to perform channel routing in VLSI layouts =-=[26, 27]-=-. However, the practical use of interval graphs in register allocation appears to have been largely ignored because of perceived difficulties in dealing both with circular arc graphs and hierarchical ... |

15 |
Compiler techniques for optimizing memory and register usage on the Cray-2
- Eisenbeis, Jalby, et al.
- 1990
(Show Context)
Citation Context ...les. The subscripted variables are allocated a set of registers that form a register pipeline. Eisenbeis et.al.proposed a method based on cyclic scheduling for optimizing register usage on the Cray-2 =-=[19]-=-. Interprocedural register allocation has been studied by a number of people [20, 10, 21]. For example, Steenkiste and Hennessy have developed an algorithm for interprocedural register 29 allocation w... |

11 |
Interval graphs and related topics
- Golumbic
- 1985
(Show Context)
Citation Context ...circular arc graphs and hierarchical interval graphs, both of which arise when dealing with real programs [14]. A great deal of theoretical work has been done, a good summary of which may be found in =-=[28, 29]-=-. Using circular arc graphs for register allocation has recently been proposed in high-level dataflow synthesis for digital systems [30, 31, 32]. In this application domain, the computation is represe... |

9 |
What are the intersection graphs of arcs in a circle
- Klee
- 1969
(Show Context)
Citation Context ...two problems are treated in Section 3 and Section 4 respectively. 6 2.4 Further Observations about Cyclic Interval Graphs Our problems are related to the class of circular-arc graph coloring problems =-=[11, 12]-=-. A graph G is called a circular-arc graph if its vertices can be placed in a one-to-one correspondence with a set of circular arcs of a circle in such a way that two vertices of G are joined by an ed... |

9 |
Transfer free register allocation in cyclic data flow graphs
- Stok
- 1992
(Show Context)
Citation Context ...taflow synthesis for digital systems [30, 31, 32]. In this application domain, the computation is represented by data flow graphs. Data flow graphs with loops can be modeled by cyclic dataflow graphs =-=[33, 34]-=-, and the corresponding register allocation problem can be modeled by circular arc graphs [34]. Unlike in compiler optimization, the hardware-oriented synthesis work traditionally does not address the... |

6 |
An O(n 1:5 ) algorithm to coloring proper circular arc graphs
- Shih, Hsu
- 1985
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Citation Context ...circular arc graphs and hierarchical interval graphs, both of which arise when dealing with real programs [14]. A great deal of theoretical work has been done, a good summary of which may be found in =-=[28, 29]-=-. Using circular arc graphs for register allocation has recently been proposed in high-level dataflow synthesis for digital systems [30, 31, 32]. In this application domain, the computation is represe... |

5 |
Register allocation using control trees
- Knobe, Zadeck
- 1992
(Show Context)
Citation Context ...r recoloring the lower level with some extra initial coloring constraints. As we shall briefly survey in Section 7, interesting work has been conducted on hierarchical methods for register allocation =-=[15, 16, 17]-=-. However, it is our belief that the clear and simple representation of the cyclic interval graph provides a good basis for representing live ranges that cross the boundaries of nested program structu... |

4 |
Hierarchical Channel Routing
- Burstein, Pelavin
- 1983
(Show Context)
Citation Context ...c graphs could be applied to program loops. Interval graphs have also been used to overlay arrays and thereby minimize program memory requirements [25], and to perform channel routing in VLSI layouts =-=[26, 27]-=-. However, the practical use of interval graphs in register allocation appears to have been largely ignored because of perceived difficulties in dealing both with circular arc graphs and hierarchical ... |

3 |
Register pipelining: An integrated approach to register allocation for scalar and subscripted variables
- Duesterwald, Gupta, et al.
- 1992
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Citation Context ...single unified framework for this optimization problem. Another approach to the problem of register allocation for scalar and subscripted variables has been suggested by Duesterwald, Gupta, and Soffa =-=[18]-=-. This method uses the integrated register allocation graph, which is an extension of the interference graph, to represent the coloring problem for both scalars and subscripted variables. The subscrip... |

3 |
Evaluation of the SPUR lisp architecture
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- 1986
(Show Context)
Citation Context ...ter pipeline. Eisenbeis et.al.proposed a method based on cyclic scheduling for optimizing register usage on the Cray-2 [19]. Interprocedural register allocation has been studied by a number of people =-=[20, 10, 21]-=-. For example, Steenkiste and Hennessy have developed an algorithm for interprocedural register 29 allocation where a procedure interference graph is constructed. Each node in the graph is a procedure... |

1 |
den Born. Synthesis of concurrent hardware structures
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- 1988
(Show Context)
Citation Context ...work has been done, a good summary of which may be found in [28, 29]. Using circular arc graphs for register allocation has recently been proposed in high-level dataflow synthesis for digital systems =-=[30, 31, 32]-=-. In this application domain, the computation is represented by data flow graphs. Data flow graphs with loops can be modeled by cyclic dataflow graphs [33, 34], and the corresponding register allocati... |