## Performing High-Level Synthesis via Program Transformations within a Theorem Prover (1998)

Venue: | In: Digital System Design Workshop at the 24th EUROMICRO 98 Conference |

Citations: | 9 - 3 self |

### BibTeX

@INPROCEEDINGS{Blumenröhr98performinghigh-level,

author = {Christian Blumenröhr and Dirk Eisenbiegler},

title = {Performing High-Level Synthesis via Program Transformations within a Theorem Prover},

booktitle = {In: Digital System Design Workshop at the 24th EUROMICRO 98 Conference},

year = {1998},

pages = {34--37}

}

### OpenURL

### Abstract

In this paper, we present a new methodology towards performing high-level synthesis. During high-level synthesis an algorithmic description is mapped to a structure of hardware components. In our approach, high-level synthesis is performed via program transformations. All transformations are performed within a higher order logic theorem prover thus guaranteeing correctness. Our approach is not restricted to data flow graphs but supports arbitrary computable functions, i.e. mixed control/data flow graphs. Furthermore, the treatment of algorithmic and interface descriptions is orthogonalised, allowing systematic reuse of designs.

### Citations

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(Show Context)
Citation Context ...cription language named Gropius 1 ranging from the gate level to the system level. Gropius [2] is a language with a formally exact semantics, where each construct is derived from logic within the HOL =-=[7]-=- theorem prover. In this paper, we will introduce the part of Gropius, that is related to the algorithmic level (section 2), and we will present a new formal hardware synthesis methodology, where the ... |

58 |
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Citation Context ... for the correctness [9] or the circuit transformations are based on a (non-mathematical) formalisation. Proofs are performed by intuition and not within a mathematical logic [8]. In the CAMAD system =-=[11]-=- for instance, the algorithmic description is given in a Pascal-like notation. For transforming the program, it is translated into a formalisation based on timed Petri-nets. Both the transformations f... |

27 |
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Citation Context ... superior to those, where the correctness of transformations is proved, but the correctness of their implementation is not. In those approaches, there are only paper&pencil proofs for the correctness =-=[9]-=- or the circuit transformations are based on a (non-mathematical) formalisation. Proofs are performed by intuition and not within a mathematical logic [8]. In the CAMAD system [11] for instance, the a... |

25 |
et al, “High-level synthesis: Introduction to chip and system design
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Citation Context ...The result of high-level synthesis is a structure at the Register Transfer level (RT-level). Usually, hardware at the RT-level consists of a data-path and a controller. In the conventional approaches =-=[5]-=-, several control states are introduced along a given control/data flow description thus partitioning it into small cycle free pieces of program, each corresponding to one clock tick. Then scheduling,... |

15 |
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(Show Context)
Citation Context ...roaches, where circuit transformations are performed by applying basic mathematical rules within a theorem prover. However, these are mostly restricted to lower abstraction levels (e.g. Lambda/Dialog =-=[6]-=-) or they are restricted towards checking some plausibility criteria rather than performing a complete proof. See [10] for a survey on formal synthesis approaches. The starting point for high-level sy... |

9 | Implementation issues about the embedding of existing high level synthesis algorithms in HOL
- Eisenbiegler, Blumenröhr, et al.
(Show Context)
Citation Context ...per addresses synthesis at the algorithmic level. It is part of our ongoing work towards a formal synthesis tool named HASH (higher order logic applied to synthesis of hardware). In our previous work =-=[3]-=-, algorithmic synthesis was restricted to pure data flow graphs. The extensions to be presented in this paper allow synthesising arbitrary algorithmic descriptions i.e. mixed control/data flow descrip... |

6 | A constructive approach towards correctness of synthesis-application within retiming - Eisenbiegler, Kumar, et al. - 1997 |

6 |
Formal synthesis in circuit design-A classification and survey
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(Show Context)
Citation Context ...wever, these are mostly restricted to lower abstraction levels (e.g. Lambda/Dialog [6]) or they are restricted towards checking some plausibility criteria rather than performing a complete proof. See =-=[10]-=- for a survey on formal synthesis approaches. The starting point for high-level synthesis is an algorithmic description. The result of high-level synthesis is a structure at the Register Transfer leve... |

2 | Deriving structural RTimplementations from algorithmic descriptions by means of logical transformations
- Blumenrohr, Eisenbiegler
- 1998
(Show Context)
Citation Context ...rogram. The concrete timing of the circuit is not yet considered. Gropius offers appropriate means for this level of abstraction. We will now briefly introduce them --- for a detailed description see =-=[1, 2]-=-. In Gropius, we distinguish between two different algorithmic descriptions: DFG-terms and P-terms. Both DFG-terms and P-terms can be used as a starting point for synthesising hardware. DFG-terms repr... |

2 |
E.Prangsma et al. A methodology for the design of guaranteed correct and efficient digital systems
- Middelhoek, Huijs
- 1996
(Show Context)
Citation Context ... only paper&pencil proofs for the correctness [9] or the circuit transformations are based on a (non-mathematical) formalisation. Proofs are performed by intuition and not within a mathematical logic =-=[8]-=-. In the CAMAD system [11] for instance, the algorithmic description is given in a Pascal-like notation. For transforming the program, it is translated into a formalisation based on timed Petri-nets. ... |

1 |
Gropius -- a hardware description language for the reuse of designs
- Eisenbiegler, Blumenrohr
(Show Context)
Citation Context ...nced by the Deutsche Forschungsgemeinschaft, Project SCHM 623/6-1. Our work is based on a formal hardware description language named Gropius 1 ranging from the gate level to the system level. Gropius =-=[2]-=- is a language with a formally exact semantics, where each construct is derived from logic within the HOL [7] theorem prover. In this paper, we will introduce the part of Gropius, that is related to t... |