A Programmable Co-processor for Profiling (2001)
Cached
Download Links
- [ftp.cs.wisc.edu]
- [www-faculty.cs.uiuc.edu]
- [www-sal.cs.uiuc.edu]
- [www.cs.wisc.edu]
- DBLP
Other Repositories/Bibliography
| Venue: | IN PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA-7 |
| Citations: | 42 - 1 self |
BibTeX
@INPROCEEDINGS{Zilles01aprogrammable,
author = {Craig B. Zilles and Gurindar S. Sohi},
title = { A Programmable Co-processor for Profiling},
booktitle = {IN PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA-7},
year = {2001},
pages = {241--253},
publisher = {}
}
Years of Citing Articles
OpenURL
Abstract
Aggressive program optimization requires accurate profile information, but such accuracy requires many samples to be collected. We explore a novel profiling architecture that reduces the overhead of collecting each sample by including a programmable co-processor that analyzes a stream of profile samples generated by a microprocessor. From this stream of samples, the co-processor can detect correlations between instructions (e.g., memory dependence profiling) as well as those between different dynamic instances of the same instruction (e.g., value profiling). The profiler's programmable nature allows a broad range of data to be extracted, post-processed, and formatted, as well as provides the flexibility to tailor the profiling application to the program under test. Because the co-processor is specialized for profiling, it can execute profiling applications more efficiently than a general-purpose processor. The co-processor should not significantly impact the cost or performance of the ...







