Theorem Proving Support for . . .

Theorem Proving Support for . . . (2000)

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by Deepak Kapur

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WORKSHOP ON FIRST-ORDER THEOREM PROVING

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@INPROCEEDINGS{Kapur00theoremproving,
    author = {Deepak Kapur},
    title = {Theorem Proving Support for . . . },
    booktitle = {WORKSHOP ON FIRST-ORDER THEOREM PROVING},
    year = {2000},
    publisher = {}
}

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Abstract

Citations

7320	Introduction to Algorithms - CORMEN, LEISERSON, et al. - 1985
2605	Graph-based algorithms for Boolean function manipulation - Bryant - 1986
431	Associative-commutative rewriting - Dershowitz, Hsiang, et al. - 1983
381	A Computational Logic Handbook - Boyer, Moore - 1988
352	Simplification by cooperating decision procedures - Nelson, Oppen - 1979
166	A Suggestion for a Fast Multiplier - Wallace - 1964
143	Deciding combinations of theories - Shostak - 1982
104	Integrating decision procedures into heuristic theorem provers: A case study with linear arithmetic - Boyer, Moore - 1986
92	Division and Square Root: Digit-Recurrence Algorithms and Implementations - Ercegovac, Lang - 1994
91	Verification of Arithmetic Functions with Binary Moment Diagrams - Bryant, Chen - 1995
62	An overview of rewrite rule laboratory (RRL - Kapur, Zhang - 1995
55	Hybrid Decision Diagrams - Overcoming the Limitation of MTBDDs and BMDs - Clarke, Fujita, et al.
53	The Use of Planning Critics in Mechanizing Inductive Proofs - Ireland - 1992
48	A mechanizable induction principle for equational specifications - Zhang, Kapur, et al. - 1988
44	A Decision Procedure for bit-Vector Arithmetic - Barlett, Dill, et al. - 1998
42	Verifying Safety Properties of a Power PC Microprocessor Using Symbolic Model Checking without BDDs - Biere, Clarke, et al. - 1999
39	SATO: An ecient propositional prover - Zhang - 1997
30	Shostak’s Congruence Closure as Completion, in: H - Kapur - 1997
27	Computer Arithmetic Systems, Algorithms, Architecture and Implementations - Omondi - 1994
22	Bit-Level Analysis of an SRT Divider Circuit - Bryant - 1995
22	New Uses of Linear Arithmetic in Automated Theorem Proving by Induction - Kapur - 1996
19	Lemma discovery in automating induction - Kapur, Subramaniam - 1996
17	Reasoning about Numbers in Tecton - Kapur, Nie - 1994
16	Implementing contextual rewriting - Zhang - 1992
14	Mechanically verifying a family of multiplier circuits - Kapur, Subramaniam - 1997
13	2000, ‘Using an induction prover for verifying arithmetic circuits - Kapur, Subramaniam
12	The FM9001 microprocessor proof - Brock, Hunt, et al. - 1994
12	Sequential circuit veri using symbolic model checking - Burch, Clarke, et al. - 1990
8	Extending decision procedures with induction schemes - Kapur, Subramaniam - 2000
8	Compatible hardware for division and square root - Taylor - 1981
6	The Verification of a Bit-Slice ALU - Brock - 1989
5	Decidable Classes of Inductive Theorems - Giesl - 2001
5	Failure Analyses in Inductive Theorem Provers - Subramaniam - 1997
4	decision procedures and lemma speculation for automated hardware veri - Kapur, \Rewriting - 1997
3	Mechanizing reasoning about large tables in a rewrite based theorem prover - Kapur, Subramaniam - 1998
2	Mechanical veri of adder circuits using powerlists - Kapur, Subramaniam - 1998
2	Subramaniam \Mechanizing reasoning about arithmetic circuits: SRT division - Kapur, M - 1997
1	and T.F.Melham, \Hardware veri using higher-order logic"", HDL Descriptions to Guaranteed Correct Circuit Designs - Camilleri, Gordon
1	Srivas, \Eective theorem proving for hardware veri - Cyrluk, Rajan, et al. - 1994
1	Towards Automatic Veri of Arithmetic Hardware - German - 1995
1	a special issue on Hardware/Software Codesign - See - 1997
1	A Mechanically Checked Proof of the Correctness of the AMD5K86 Floating Point Division Algorithm - Moore, Lynch, et al. - 1996
1	Leathrum Jr., \Veri of IEEE compliant subtractive division algorithm - Miner, F - 1996
1	Design of a high speed square root multiply and divide unit - Zurawski - 1987