## Lava: Hardware Design in Haskell (1998)

Citations: | 113 - 7 self |

### BibTeX

@MISC{Bjesse98lava:hardware,

author = {Per Bjesse and Koen Claessen and Mary Sheeran},

title = {Lava: Hardware Design in Haskell},

year = {1998}

}

### Years of Citing Articles

### OpenURL

### Abstract

Lava is a tool to assist circuit designers in specifying, designing, verifying and implementing hardware. It is a collection of Haskell modules. The system design exploits functional programming language features, such as monads and type classes, to provide multiple interpretations of circuit descriptions. These interpretations implement standard circuit analyses such as simulation, formal veri#cation and the generation of code for the production of real circuits.

### Citations

44 | Otter: The cade-13 competition incarnations
- Mccune, Wos
- 1997
(Show Context)
Citation Context ..., b10 !-? (b3 !-? b9) , b11 !-? (b4 !-? b8), b12 !-? b10 & b11 ) -? b12 Currently Lava interfaces to the propositional tautology checker Prover [Sta89] and the first order logic theorem provers Otter =-=[MW97]-=- and Gandalf [Tam97]. 3.5 Other Interpretations Using the same idea, we can generate input for other tools as well. An interesting target format is VHDL, which is one of the standard hardware descript... |

25 | Specifying superscalar microprocessors in Hawk
- Cook, Launchbury, et al.
- 1998
(Show Context)
Citation Context ...sis engines and so on) to process it, or to make use of existing Haskell compilers by embedding a hardware description language in Haskell. Launchbury and his group are investigating the first option =-=[CLM98]-=-. We chose the second. 2 Overview of the System This section presents the types and abstractions used in the Lava system. 2.1 Monads Dealing with an embedded language in a functional language requires... |

22 | From transistors to computer architecture: Teaching functional circuit specification in hydra - O'Donnell - 1995 |

16 | Collecting Butterflies
- Jones, Sheeran
- 1991
(Show Context)
Citation Context ...ell. We call our design system Lava. The idea of using a functional hardware description langauge is, of course, not new, and the work described here builds on our earlier work on FP [She85] and Ruby =-=[JS90]-=-, and on the use of non-standard interpretation in circuit analysis [Sin91]. What is new about Lava is that we have built a complete system in which real circuits can be described, verified, and imple... |

16 |
Designing regular array architectures using higher order functions
- Sheeran
- 1985
(Show Context)
Citation Context ...ing language Haskell. We call our design system Lava. The idea of using a functional hardware description langauge is, of course, not new, and the work described here builds on our earlier work on FP =-=[She85]-=- and Ruby [JS90], and on the use of non-standard interpretation in circuit analysis [Sin91]. What is new about Lava is that we have built a complete system in which real circuits can be described, ver... |

14 | Inverting the Abstraction Mapping: A Methodology for Hardware Verification
- Cyrluk
- 1996
(Show Context)
Citation Context ...ription and verification [HD92]. Hanna's work inspired much research on using Higher Order Logic for hardware verification. The PVS theorem prover, which is increasingly used in hardware verification =-=[Cyr96]-=-, is also based on a functional language with dependent types. We do not know of work in which circuit descriptions written in this language are used for anything other than proof in PVS. HML is a har... |

6 |
HML: An innovative hardware design language and its translation to VHDL
- Li, Leeser
- 1995
(Show Context)
Citation Context ...now of work in which circuit descriptions written in this language are used for anything other than proof in PVS. HML is a hardware description language based on ML, developed by Leeser and her group =-=[LL95]-=-. The language benefits from having higher order functions, a strong type system and polymorphism, just as ours does. The emphasis in HML is on simulation and synthesis, and not on formal verification... |

6 | How to prove properties of recursively defined circuits using Stalmarck's method
- Sheeran, Boralv
- 1998
(Show Context)
Citation Context ...and Bezier curve drawing circuits for implementation in a Field Programmable Gate Array based PostScript accelerator. Using the current system, very large combinational multipliers have been verified =-=[SB98]-=-. The largest formula produced so far from a circuit description had almost a million connectives. The system is constructed in a way that systematically makes use of important features of Haskell: mo... |

4 | Mechanically verifying the correctness of the Fast Fourier Transform in ACL2
- Gamboa
- 1998
(Show Context)
Citation Context ...le factor theory). 4.7 Related work on FFT description and verification The equivalence of a Radix-2 FFT algorithm and the DFT has been shown using ACL2, a descendant of the BoyerMoore theorem prover =-=[Gam98]-=-. Our approach in the example is slightly different in that we want to show automatically generated logical descriptions of circuits of a fixed size equivalent, rather than proving mathematical theore... |

4 |
Concurrent VLSI Architectures for DFT Computing and Algorithms for Multi-output Logic Decomposition
- He
- 1995
(Show Context)
Citation Context ... power consumption. FFTs are key building blocks in most signal processing applications. We discuss the description of circuits for two different FFT algorithms: the Radix-2 FFT and the Radix-2 2 FFT =-=[He95]-=-. 4.3 Two FFT circuits The decimation in time Radix-2 FFT is a standard algorithm, which operates on input sequences of which the length is a power of two [PM92]. This restriction makes it possible to... |

3 |
Dependent types and formal
- Hanna, Daeche
- 1992
(Show Context)
Citation Context ...ion of real circuits, although work on circuit synthesis is in progress. Keith Hanna has long argued for the use of a functional language with dependent types in hardware description and verification =-=[HD92]-=-. Hanna's work inspired much research on using Higher Order Logic for hardware verification. The PVS theorem prover, which is increasingly used in hardware verification [Cyr96], is also based on a fun... |

3 | The study of butter ies - Jones, Sheeran - 1991 |

2 |
A fast flutter by the Fourier transform
- Jones
- 1991
(Show Context)
Citation Context ...tions by the introduction of a complex number datatype and new combinators that allow two FFT circuits to be described. The work presented here builds on previous work on deriving the FFT within Ruby =-=[Jon90]-=- and specifying signal processing software in Haskell [Bje97]. 4.1 Complex numbers Two flavours of complex numbers are needed for simulation and verification: concrete values and variables representin... |

1 |
Specification of signal processing programs in a pure functional language and compilation to distributed architectures
- Bjesse
- 1997
(Show Context)
Citation Context ...w combinators that allow two FFT circuits to be described. The work presented here builds on previous work on deriving the FFT within Ruby [Jon90] and specifying signal processing software in Haskell =-=[Bje97]-=-. 4.1 Complex numbers Two flavours of complex numbers are needed for simulation and verification: concrete values and variables representing complex numbers. The implementation datatype CmplxSig refle... |

1 | Speci cation of signal processing programs in a pure functional language and compilation to distributed architectures - Bjesse - 1997 |

1 | A fast utter by the Fourier transform - Jones - 1990 |

1 | How to prove properties of recursively de ned circuits using Stalmarck's method - Sheeran, Boralv - 1998 |