## Phase-Noise Cancellation Design Tradeoffs in DeltaSigma Fractional-N PLLs (2003)

Venue: | IEEE Transactions on Circuits and Systems II : Analog and Digital Signal Processing |

Citations: | 5 - 2 self |

### BibTeX

@INPROCEEDINGS{Pamarti03phase-noisecancellation,

author = {Sudhakar Pamarti and Ian Galton},

title = {Phase-Noise Cancellation Design Tradeoffs in DeltaSigma Fractional-N PLLs},

booktitle = {IEEE Transactions on Circuits and Systems II : Analog and Digital Signal Processing},

year = {2003}

}

### OpenURL

### Abstract

Abstract—A theoretical analysis of a recently proposed phasenoise cancellation technique that relaxes the fundamental tradeoff between phase noise and bandwidth in 16 fractional- phasedlocked loops (PLLs) is presented. The limits imposed by circuit errors and PLL dynamics on the phase noise and loop bandwidth that can be achieved by PLLs incorporating the technique are quantified. Design guidelines are derived that enable customization of the technique in terms of PLL target specifications. Index Terms—Delta–sigma modulator, fractional- PLL, phased-locked loop (PLL), segmented digital-to-analog converter (DAC), synthesizer. I.

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Citation Context ...he segmented mismatch shaping encoder exploits redundancy in the DAC banks to guarantee that has the aforementioned properties. While multiple methods of realizing the encoder have been reported [12]–=-=[15]-=-, none of them offer closed form expressions for . Therefore, simulations are relied upon to determine the degree of mismatch among the DAC elements that can be tolerated. As reported in [16], it may ... |

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Citation Context ...NOISE CANCELLATION DESIGN TRADEOFFS IN DELTA-SIGMA FRACTIONAL- PLLS 831 Fig. 2. Signal-processing model for technique including a gain error in the cancellation path. portion, the model is well known =-=[7]-=-, [8]. The shaded portion represents the DAC cancellation path when requantization of is ignored, as given by (2). The model output is the PLL phase noise. The low-pass filter in the model represents ... |

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Citation Context ... CANCELLATION DESIGN TRADEOFFS IN DELTA-SIGMA FRACTIONAL- PLLS 831 Fig. 2. Signal-processing model for technique including a gain error in the cancellation path. portion, the model is well known [7], =-=[8]-=-. The shaded portion represents the DAC cancellation path when requantization of is ignored, as given by (2). The model output is the PLL phase noise. The low-pass filter in the model represents the r... |

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Citation Context ...may be possible to derive closed form expressions for if detailed statistics of the quantization noise are available. Another alternative is to use reported bounds on the power in low-frequency bands =-=[17]-=- to make some approximate quantitative predictions about tolerable mismatches. B. Number of Input Bits in the Fractional Modulator The digital hardware complexity of the cancellation path can be reduc... |