Reprogrammable Network Packet Processing on the Field Programmable Port Extender (FPX) (2001)
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BibTeX
@MISC{Lockwood01reprogrammablenetwork,
author = {John W. Lockwood and Naji Naufel and Jon S. Turner and David E. Taylor},
title = {Reprogrammable Network Packet Processing on the Field Programmable Port Extender (FPX)},
year = {2001}
}
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Abstract
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extender (FPX), enables packet processing functions to be implemented as modular components in reprogrammable hardware. All logic on the on the FPX is implemented in two Field Programmable Gate Arrays (FPGAs). Packet processing functions in the system are implemented as dynamicallyloadable modules. Core functionality of the FPX is implemented on an FPGA called the Networking Interface Device (NID). The NID contains the logic to transmit and receive packets over a network, dynamically reprogram hardware modules, and route individual tra#c flows. A full, non-blocking, switch is implemented on the NID to route packets between the networking interfaces and the modular components. Modular components of the FPX are implemented on a second FPGA called the Reprogrammable Application Device (RAD). Modules are loaded onto t...
