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Cache-Conscious Structure Layout (1999)
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BibTeX
@MISC{Chilimbi99cache-consciousstructure,
author = {Trishul M. Chilimbi and Mark D. Hill and James R. Larus},
title = {Cache-Conscious Structure Layout},
year = {1999}
}
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Abstract
Hardware trends have produced an increasing disparity between processor speeds and memory access times. While a variety of techniques for tolerating or reducing memory latency have been proposed, these are rarely successful for pointer-manipulating programs. This paper explores a complementary approach that attacks the source (poor reference locality) of the problem rather than its manifestation (memory latency). It demonstrates that careful data organization and layout provides an essential mechanism to improve the cache locality of pointer-manipulating programs and consequently, their performance. It explores two placement technique-lustering and colorinet improve cache performance by increasing a pointer structure’s spatial and temporal locality, and by reducing cache-conflicts. To reduce the cost of applying these techniques, this paper discusses two strategies-cache-conscious reorganization and cacheconscious allocation--and describes two semi-automatic toolsccmorph and ccmalloc-that use these strategies to produce cache-conscious pointer structure layouts. ccmorph is a transparent tree reorganizer that utilizes topology information to cluster and color the structure. ccmalloc is a cache-conscious heap allocator that attempts to co-locate contemporaneously accessed data elements in the same physical cache block. Our evaluations, with microbenchmarks, several small benchmarks, and a couple of large real-world applications, demonstrate that the cache-conscious structure layouts produced by ccmorph and ccmalloc offer large performance benefit-n most cases, significantly outperforming state-of-the-art prefetching.
Keyphrases
cache-conscious structure layout pointer-manipulating program memory latency temporal locality state-of-the-art prefetching large performance benefit-n cache locality essential mechanism processor speed placement technique-lustering several small benchmark strategies-cache-conscious reorganization cache performance complementary approach pointer structure hardware trend cache-conscious pointer structure semi-automatic toolsccmorph transparent tree reorganizer topology information poor reference locality cache-conscious heap allocator physical cache block careful data organization large real-world application data element memory access time cacheconscious allocation
