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Subthreshold Voltage High-k CMOS Devices Have Lowest Energy and High Process Tolerance
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BibTeX
@MISC{Venkatasubramanian_subthresholdvoltage,
author = {Muralidharan Venkatasubramanian and Vishwani D. Agrawal},
title = {Subthreshold Voltage High-k CMOS Devices Have Lowest Energy and High Process Tolerance},
year = {}
}
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Abstract
Abstract — Evolving nanometer CMOS technologies provide low power, high performance and higher levels of integration but suffer from increased subthreshold leakage and excessive process variation. The present work examines the 45nm bulk and high-k technologies. We evaluate the performance of a 32-bit ripplecarry adder circuit for the entire range of supply voltages over which it displays correct function. Lowering voltage increases delay, reducing the maximum clock cycle rate. We use the maximum permissible clock rate and the energy per cycle at that clock rate as two performance criteria. The minimum energy per cycle operation occurs at a subthreshold voltage. For minimum energy, the bulk technology has a very low performance (~7 MHz). However, high-k technology works at a much higher 250 MHz clock. Faster clock rate reduces the leakage energy making high-k almost twice as energy efficient compared to bulk. The energy per cycle versus supply voltage is a U-shaped curve whose bottom, the minimum energy point, provides a stable equilibrium against speed and energy deviations due to process related parametric variations for different technologies. These deviations can be expected to be lower for high k technology compared to those circuits designed in bulk technology that are commonly in use. These deviations are also lower compared to those at higher supply voltages that are commonly in use. Although we expect the clock rate to further improve and energy per cycle to reduce for 32 nm and finer technologies, some projections indicate that energy per cycle could increase with a move towards finer technologies. However, those studies were conducted on bulk technologies and further investigation should ascertain the performance of the high-k technology. Keywords – Low-power circuits, subthreshold voltage operation, nanometer CMOS devices, high-k CMOS technology, process variation.
Keyphrases
high process tolerance subthreshold voltage high-k cmos device lowest energy high-k technology bulk technology clock rate finer technology minimum energy supply voltage faster clock rate cmos technology mhz clock maximum permissible clock rate present work u-shaped curve cycle operation keywords low-power circuit low performance cycle versus supply voltage excessive process variation correct function process variation high performance subthreshold leakage abstract evolving 32-bit ripplecarry adder circuit low power high-k cmos technology related parametric variation subthreshold voltage operation entire range maximum clock cycle rate voltage increase delay performance criterion leakage energy minimum energy point high technology subthreshold voltage energy efficient cmos device different technology stable equilibrium energy deviation
