## Optimal Design of a CMOS Op-Amp via Geometric Programming (2001)

### Cached

### Download Links

- [www.stanford.edu]
- [stanford.edu]
- [www.stanford.edu]
- [www.stanford.edu]
- [www.stanford.edu]
- [stanford.edu]
- [www.stanford.edu]
- DBLP

### Other Repositories/Bibliography

Venue: | IEEE Transactions on Computer-Aided Design |

Citations: | 52 - 10 self |

### BibTeX

@ARTICLE{Hershenson01optimaldesign,

author = {Maria del Mar Hershenson and Stephen P. Boyd and Thomas H. Lee},

title = {Optimal Design of a CMOS Op-Amp via Geometric Programming},

journal = {IEEE Transactions on Computer-Aided Design},

year = {2001},

volume = {20},

pages = {1--21}

}

### Years of Citing Articles

### OpenURL

### Abstract

We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result, the amplifier design problem can be expressed as a special form of optimization problem called geometric programming, for which very efficient global optimization methods have been developed. As a consequence we can efficiently determine globally optimal amplifier designs or globally optimal tradeoffs among competing performance measures such as power, open-loop gain, and bandwidth. Our method, therefore, yields completely automated sizing of (globally) optimal CMOS amplifiers, directly from specifications.

### Citations

462 | Primal-Dual Interior-Point Methods
- Wright
- 1997
(Show Context)
Citation Context ...actice are only beginning to be appreciated now. The main reason is the development of extremely powerful interior-point methods for general convex optimization problems in the last five years (e.g., =-=[72, 102]-=-). These methods can solve large problems, with thousands of variables and tens of thousands of constraints, very e#ciently (in minutes on a small workstation). Problems involving tens of variables an... |

377 |
Simulated Annealing: Theory and Applications
- Laarhoven, Aarts
- 1987
(Show Context)
Citation Context ...t are guaranteed to find the globally optimal design have also been used in analog circuit design. The most widely known global optimization methods are branch and bound [103] and simulated annealing =-=[100, 93]-=-. A branch and bound method is used, for example, in [65]. Branch and bound methods unambiguously determine the globally optimal design: at each iteration they maintain a suboptimal feasible design an... |

326 |
Analog Integrated Circuit Design
- Johns, Martin
- 1997
(Show Context)
Citation Context ...tive, as the poles (whereas precisely speaking, the poles are -p 1 . . . , -p 4 ). We now give the expressions for the gain and poles. The two-stage opamp has been previously analyzed by many authors =-=[87, 31, 52]-=-. The compensation scheme has also been analyzed previously [2, 101]. A complete derivation of the next results can be found in [101]. . The open-loop voltage gain is A v = # gm2 g o2 + g o4 ## gm6 g ... |

315 |
Nonlinear Programming: Sequential Unconstrained Minimization Techniques
- Fiacco, McCormick
- 1968
(Show Context)
Citation Context ...y found for the last value of t. It can be shown that when t # m/#, the optimal solution of this problem is no more than # suboptimal for the original convex form GP. For much more detail, see, e.g., =-=[10, 34]-=-. Despite the simplicity of the algorithm (i.e., primal only, with no sparsity exploited) and the overhead of an interpreted language, the geometric programs arising in this paper were all solved in a... |

312 |
Physics of Semiconductor DeVices
- Sze
- 1981
(Show Context)
Citation Context ...models used in our method. The model is very similar to the standard long channel square law model described in, e.g., [83, 84]. This model can be inadequate for short channel transistors (see, e.g., =-=[85, 86]-=-), in which case better models can be developed that still allow optimization via geometric programming; see x7.5. D GID G S NMOS A.1 Large signal models Figure 11: Transistor symbols S D PMOS Correct... |

306 |
Analysis and Design of Analog Integrated Circuits
- Gray, Meyer
- 1993
(Show Context)
Citation Context ...38sA MOSFET models In this section we describe the MOSFET large and small signal models used in our method. The model is very similar to the standard long channel square law model described in, e.g., =-=[83, 84]-=-. This model can be inadequate for short channel transistors (see, e.g., [85, 86]), in which case better models can be developed that still allow optimization via geometric programming; see x7.5. D GI... |

249 |
Interior-point polynomial methods in convex programming
- Nesterov, Nemirovsky
- 1994
(Show Context)
Citation Context ...actice are only beginning to be appreciated now. The main reason is the development of extremely powerful interior-point methods for general convex optimization problems in the last five years (e.g., =-=[72, 102]-=-). These methods can solve large problems, with thousands of variables and tens of thousands of constraints, very e#ciently (in minutes on a small workstation). Problems involving tens of variables an... |

166 |
TILOS: A posynomial programming approach to transistor sizing
- Fishburn
- 1985
(Show Context)
Citation Context ...we can employ. As far as we know, the only other application of geometric programming to circuit design is in transistor and wire sizing for Elmore delay minimization in digital circuits, as in TILOS =-=[35]-=- and other programs [86, 80, 81]. viii Hershenson, Boyd, and Lee Their use of geometric programming can be distinguished from ours in several ways. First of all, the geometric programs that arise in E... |

143 | Linear Programming: Foundations and Extensions
- Vanderbei
- 2008
(Show Context)
Citation Context ...nvex form). It is also possible to solve the convex form problem using general purpose optimization codes that handle smooth objectives and constraint functions, e.g., LANCELOT [16], MINOS [70], LOQO =-=[96]-=-, or LINGO-NL [82]. These codes will (in principle) find a globally optimal solution, since the convex form problem is convex. They will also determine the optimal dual variables (sensitivities) as a ... |

127 |
CMOS Analog Circuit Design
- Allen, Holberg
(Show Context)
Citation Context ...38sA MOSFET models In this section we describe the MOSFET large and small signal models used in our method. The model is very similar to the standard long channel square law model described in, e.g., =-=[83, 84]-=-. This model can be inadequate for short channel transistors (see, e.g., [85, 86]), in which case better models can be developed that still allow optimization via geometric programming; see x7.5. D GI... |

96 |
LANCELOT: A Fortran Package for LargeScale Nonlinear Optimization (Release A
- Toint
- 1991
(Show Context)
Citation Context ...n analog circuit CAD. These methods can be traced back to the survey paper [11]. The widely used general purpose optimization codes NPSOL [38] and MINOS [70] are used in, e.g., [63, 66, 24]. LANCELOT =-=[16]-=-, another general purpose optimizer, is used in [22]. Other CAD approaches based on classical optimization methods, and extensions such as a minimax formulation, include the one described in [62, 46, ... |

90 | An exact solution to the transistor sizing problem for CMOS circuits using convex optimization
- Sapatnekar, Rao, et al.
- 1993
(Show Context)
Citation Context ... we know, the only other application of geometric programming to circuit design is in transistor and wire sizing for Elmore delay minimization in digital circuits, as in TILOS [35] and other programs =-=[86, 80, 81]-=-. viii Hershenson, Boyd, and Lee Their use of geometric programming can be distinguished from ours in several ways. First of all, the geometric programs that arise in Elmore delay minimization are ver... |

82 |
User’s guide for NPSOL (version 4.0): A Fortran package for nonlinear programming
- Gill, Murray, et al.
- 1986
(Show Context)
Citation Context ...mming and Lagrange multiplier methods, have been widely used in analog circuit CAD. These methods can be traced back to the survey paper [11]. The widely used general purpose optimization codes NPSOL =-=[38]-=- and MINOS [70] are used in, e.g., [63, 66, 24]. LANCELOT [16], another general purpose optimizer, is used in [22]. Other CAD approaches based on classical optimization methods, and extensions such as... |

77 |
Saunders,MINOS 5.4 user's guide
- Murtagh, A
- 1995
(Show Context)
Citation Context ...nge multiplier methods, have been widely used in analog circuit CAD. These methods can be traced back to the survey paper [11]. The widely used general purpose optimization codes NPSOL [38] and MINOS =-=[70]-=- are used in, e.g., [63, 66, 24]. LANCELOT [16], another general purpose optimizer, is used in [22]. Other CAD approaches based on classical optimization methods, and extensions such as a minimax form... |

71 |
Temes, Analog MOS Integrated Circuits for Signal Processing
- Gregorian, C
- 1986
(Show Context)
Citation Context ...d below are generally more strict, and describe the real design constraint. Nevertheless it is common practice to impose a minimum ratio between the dominant and non-dominant poles; see, for example, =-=[41]-=-. 1.5.6 Unity-gain bandwidth and phase margin We define the unity-gain bandwidth # c as the frequency at which |H(j# c )| = 1. The phase margin is defined in terms of the phase of the transfer functio... |

70 |
Device Electronics for Integrated Circuits
- Muller, Kamins
- 1986
(Show Context)
Citation Context ...models used in our method. The model is very similar to the standard long channel square law model described in, e.g., [83, 84]. This model can be inadequate for short channel transistors (see, e.g., =-=[85, 86]-=-), in which case better models can be developed that still allow optimization via geometric programming; see x7.5. D GID G S NMOS A.1 Large signal models Figure 11: Transistor symbols S D PMOS Correct... |

65 | Oasys: A framework for analog circuit synthesis
- Harjani, Rutenbar, et al.
- 1992
(Show Context)
Citation Context ...mples include genetic algorithms or evolution systems like SEAS [73], DARWIN [57, 99]; systems based on fuzzy logic like FASY [91] and [45]; special heuristics based systems like IDAC [28, 29], OASYS =-=[43]-=-, BLADES [21], and KANSYS [42]. One advantage of these methods is that there are few limitations on the types of problems, specifications, and performance measures that can be considered. Indeed, ther... |

58 |
Introduction to Convex Optimization with Engineering Applications
- Boyd, Vandenberghe
- 2003
(Show Context)
Citation Context ...methods described above. This is the price that is paid for the advantages of extreme e#ciency and global solutions. (For more on convex optimization, and the implications for engineering design, see =-=[10]-=-.) The contribution of this paper is to show how to formulate the analog amplifier design problem as a certain type of convex problem called geometric programming. The advantages, compared to the appr... |

56 |
C.L.Liu. Simulated Annealing for VLSI Design
- Wong
- 1988
(Show Context)
Citation Context ...t are guaranteed to find the globally optimal design have also been used in analog circuit design. The most widely known global optimization methods are branch and bound [103] and simulated annealing =-=[100, 93]-=-. A branch and bound method is used, for example, in [65]. Branch and bound methods unambiguously determine the globally optimal design: at each iteration they maintain a suboptimal feasible design an... |

51 |
Design of Analog Integrated Circuits and Systems
- Laker, Sansen
- 1994
(Show Context)
Citation Context ...rticular, we can specify a minimum acceptable value of CMRR. 1.6.3 Power supply rejection ratio Negative power supply rejection ratio The negative power supply rejection ratio (PSRR) is given by (see =-=[58, 51]-=-) gm2 gm6 (g o2 + g o4 ) g o6 1 (1 + s/p 1 )(1 + s/p 2 ) . (1.39) Thus, the low-frequency negative PSRR is given by the inverse posynomial expression g m2 gm6 (g o2 + g o4 ) g o6 , (1.40) which, there... |

45 |
Practical Synthesis of High Performance Analog Circuits
- Ochotta, Mukherjee, et al.
- 1999
(Show Context)
Citation Context ...nd discrete variables, as in, e.g., simultaneous amplifier topology and sizing problems. Simulated annealing has been used in Chapter 1. Optimal CMOS Op-amp Design vii several tools such as ASTR/OBLX =-=[76]-=-, OPTIMAN [37] , FRIDGE [67], SAMM [105] and [14]. The main advantages of SA are that it handles discrete variables well, and greatly reduces the chances of finding a nonglobally optimal design. (Prac... |

44 |
Geometric Programming –Theory and Application
- Duffin, Peterson, et al.
- 1967
(Show Context)
Citation Context ...nimizing (the posynomial) 1/h. Geometric programming has been known and used since the late 1960s, in various fields. There were two early books on geometric programming, by Du#n, Peterson, and Zener =-=[18]-=- and Zener [106], which include the basic theory, some electrical engineering applications (e.g., optimal transformer design), but not much on numerical solution methods. Another book appeared in 1976... |

44 |
Darwin: Cmos opamp synthesis by means of a genetic algorithm
- Kruiskamp, Leenaerts
- 1995
(Show Context)
Citation Context ...) Knowledge-Based Methods: Knowledge-based and expert-systems methods have also been widely used in analog circuit CAD. Examples include genetic algorithms or evolution systems like SEAS [74], DARWIN =-=[58]-=-, [100]; systems based on fuzzy logic like FASY [46] and [92]; special heuristics-based systems like IDAC [29], [30], OASYS [44], BLADES [21], and KANSYS [43]. One advantage of these methods is that t... |

39 |
Geometric programming: methods, computations and applications
- Ecker
- 1980
(Show Context)
Citation Context ...asic theory, some electrical engineering applications (e.g., optimal transformer design), but not much on numerical solution methods. Another book appeared in 1976 [9]. The 1980 survey paper by Ecker =-=[19]-=- has many references on applications and methods, including numerical solution methods used at that time. Geometric programming is briefly described in some surveys of optimization, e.g., [20, p326-32... |

38 |
DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits
- Nye, Riley, et al.
- 1988
(Show Context)
Citation Context ...N [55], CADICS [53], WATOPT [30], and STAIC [44]. The classical methods can be used with more complicated circuit models, including even full SPICE simulations in each iteration, as in DELIGHT. SPICE =-=[74]-=- (which uses the general purpose optimizer DELIGHT [75]) and ECSTASY [85]. The main advantage of these methods is the wide variety of problems they can handle; the only requirement is that the perform... |

38 |
Optimization-based transistor sizing
- Shyu, Sangiovanni-Vincentelli, et al.
- 1988
(Show Context)
Citation Context ... we know, the only other application of geometric programming to circuit design is in transistor and wire sizing for Elmore delay minimization in digital circuits, as in TILOS [35] and other programs =-=[86, 80, 81]-=-. viii Hershenson, Boyd, and Lee Their use of geometric programming can be distinguished from ours in several ways. First of all, the geometric programs that arise in Elmore delay minimization are ver... |

34 |
OPASYN: A Compiler for CMOS Operational Amplifiers
- Koh, Sequin, et al.
- 1990
(Show Context)
Citation Context ...ose optimizer, is used in [22]. Other CAD approaches based on classical optimization methods, and extensions such as a minimax formulation, include the one described in [62, 46, 60], OAC [77], OPASYN =-=[55]-=-, CADICS [53], WATOPT [30], and STAIC [44]. The classical methods can be used with more complicated circuit models, including even full SPICE simulations in each iteration, as in DELIGHT. SPICE [74] (... |

33 |
An infeasible interior-point algorithm for solving primal and dual geometric programs
- Kortanek, Xu, et al.
- 1997
(Show Context)
Citation Context ...l interior-point methods used in linear programming can be extended to geometric programming, resulting in an algorithm approaching the e#- ciency of current interior-point linear programming solvers =-=[56]-=-. The algorithm they describe has the desirable feature of exploiting sparsity in the problem, i.e., e#ciently handling problems in which each variable appears in only a few constraints. Other methods... |

31 |
Analog circuit design optimization based on symbolic simulation and simulated annealing,‖ in
- Gielen, Walscharts, et al.
- 1990
(Show Context)
Citation Context ...riables, as in, e.g., simultaneous amplifier topology and sizing problems. Simulated annealing has been used in Chapter 1. Optimal CMOS Op-amp Design vii several tools such as ASTR/OBLX [76], OPTIMAN =-=[37]-=- , FRIDGE [67], SAMM [105] and [14]. The main advantages of SA are that it handles discrete variables well, and greatly reduces the chances of finding a nonglobally optimal design. (Practical implemen... |

29 | GPCAD: A tool for CMOS op-amp synthesis
- Hershenson, Boyd, et al.
- 1998
(Show Context)
Citation Context ...an be applied to a wide variety of amplifier architectures, but in this paper we apply the method to a specific twostage CMOS op-amp. The authors show how the method extends to other architectures in =-=[50, 49]-=-. The work reported in this paper originated as Mar Hershenson's project for the course EE364, Introduction to Convex Optimization with EngineeringsApplications, given at Stanford in Winter quarter 19... |

28 | Optimal wire and transistor sizing for circuits with non-tree topology
- Vandenberghe, Boyd, et al.
- 1997
(Show Context)
Citation Context ...t is convex. In [88] the authors optimize a few design variables in an op-amp using a Lagrange multiplier method, which yields the global optimum since the small subproblems considered are convex. In =-=[94, 95]-=-, convex optimization is used to optimize area, power, and dominant time constant in digital circuit wire and transistor sizing. 1.1.3 Outline of paper In 1.2, we briefly describe geometric programmin... |

25 |
An improved frequency compensation technique for CMOS operational amplifiers
- Ahuja
- 1983
(Show Context)
Citation Context ...ght half plane zero that arises from the feedforward signal path through the compensating capacitor. Fortunately the zero is easily removed by a suitable choice for the compensation resistor R c (see =-=[2]-=-). This op-amp is a widely used general purpose op-amp [87]; it finds applications for example in switched capacitor filters [23], analog to digital converters [71, 59], and sensing circuits [84]. The... |

25 |
Applied Geometric Programming
- Beightler, Philips
- 1976
(Show Context)
Citation Context ...and Zener [106], which include the basic theory, some electrical engineering applications (e.g., optimal transformer design), but not much on numerical solution methods. Another book appeared in 1976 =-=[9]-=-. The 1980 survey paper by Ecker [19] has many references on applications and methods, including numerical solution methods used at that time. Geometric programming is briefly described in some survey... |

25 | Optimization of inductor circuits via geometric programming - Hershenson, Mohan, et al. - 1999 |

23 |
Introduction to operations research
- Ecker, Kupferschmid
- 2004
(Show Context)
Citation Context ...y Ecker [19] has many references on applications and methods, including numerical solution methods used at that time. Geometric programming is briefly described in some surveys of optimization, e.g., =-=[20, p326-328]-=- or [98, Ch.4]. While geometric programming is certainly known, it is nowhere near as widely known as, say, linear programming. In addition, advances in general purpose nonlinear constrained optimizat... |

23 |
Sansen W.: ISAAC: A symbolic simulator for analog integrated circuits
- Gielen, Walscharts
(Show Context)
Citation Context ...the analytical expressions for the constraints and specifications were derived by hand, but in a more general setting this step could be automated by the use of symbolic circuit simulators like ISAAC =-=[36]-=-, SYNAP [83] and ASAP [32]. A CAD tool for optimization of analog op-amps could be developed. It would consist of a symbolic analyzer ([33]), a GP code solver, Chapter 1. Optimal CMOS Op-amp Design xl... |

21 | 1.8V Digital-Audio Sigma-Delta Modulator in 0.8um CMOS
- Rabii
- 1997
(Show Context)
Citation Context ...an(x) x atan(x) x .75x 0.7 FIGURE 1.2. Approximations of arctan(x) 1.6 Other constraints In this section we collect several other important constraints. 1.6.1 Slew rate The slew rate can be expressed =-=[78]-=- as SR = min{2I 1 /C c , I 7 /(C c + CTL )}. xxiv Hershenson, Boyd, and Lee In order to ensure a minimum slew rate SR min we can impose the two constraints C c 2I 1 # 1 SR min , C c + CTL I 7 # 1 SR m... |

21 |
Measurement and Analysis of Charge Injection in MOS Analog Switches
- Shieh, Patil, et al.
- 1987
(Show Context)
Citation Context ... (see [2]). This op-amp is a widely used general purpose op-amp [87]; it finds applications for example in switched capacitor filters [23], analog to digital converters [71, 59], and sensing circuits =-=[84]-=-. There are 18 design parameters for the two-stage op-amp: iv Hershenson, Boyd, and Lee PSfrag replacements M 1 M 2 M 3 M 4 M 5 M 6 M 7 M 8 I bias VDD V SS CL C c R c V in+ V inFIGURE 1.1. Two stage o... |

19 |
BLADES: An Artificial Intelligence Approach to Analog Circuit Design
- El-Turky, Perry
- 1989
(Show Context)
Citation Context ... genetic algorithms or evolution systems like SEAS [73], DARWIN [57, 99]; systems based on fuzzy logic like FASY [91] and [45]; special heuristics based systems like IDAC [28, 29], OASYS [43], BLADES =-=[21]-=-, and KANSYS [42]. One advantage of these methods is that there are few limitations on the types of problems, specifications, and performance measures that can be considered. Indeed, there are even fe... |

19 |
Geometric Programming
- Duffin, Peterson, et al.
- 1967
(Show Context)
Citation Context ...ry design we have carried out.) However, if the positive PSRR specification becomes critical, it can be approximated (conservatively) by a posynomial inequality, e.g., using Duffin linearization [7], =-=[17]-=-. D. Noise Performance The equivalent input-referred noise power spectral density (in V /Hz, at frequency assumed smaller than the 3-dB bandwidth), can be expressed as where is the input-referred nois... |

17 |
A survey of optimization techniques for integrated-circuit design
- Brayton, Hachtel, et al.
- 1981
(Show Context)
Citation Context ...= 0. 1.1.2 Other approaches There is a huge literature, which goes back more than twenty years, on computer-aided design of analog circuits. A good survey of early research can be found in the survey =-=[11]-=-; more recent papers on analog circuit CAD tools include, e.g., [13, 4, 12]. The problem we consider in this paper, i.e., selection of component values and transistor dimensions, is only a part of a c... |

15 | Optimizing dominant time constant in RC circuits
- Vandenberghe, Boyd, et al.
- 1996
(Show Context)
Citation Context ...t is convex. In [88] the authors optimize a few design variables in an op-amp using a Lagrange multiplier method, which yields the global optimum since the small subproblems considered are convex. In =-=[94, 95]-=-, convex optimization is used to optimize area, power, and dominant time constant in digital circuit wire and transistor sizing. 1.1.3 Outline of paper In 1.2, we briefly describe geometric programmin... |

14 | Wire sizing as a convex optimization problem: exploring the area-delay tradeo
- Sapatnekar
- 1996
(Show Context)
Citation Context ... we know, the only other application of geometric programming to circuit design is in transistor and wire sizing for Elmore delay minimization in digital circuits, as in TILOS [35] and other programs =-=[86, 80, 81]-=-. viii Hershenson, Boyd, and Lee Their use of geometric programming can be distinguished from ours in several ways. First of all, the geometric programs that arise in Elmore delay minimization are ver... |

14 |
Synthesis Tools for MixedSignal ICs
- Carley, Gielen, et al.
- 1996
(Show Context)
Citation Context ...ack more than 20 years, on computer-aided design (CAD) of analog circuits. A good survey of early research can be found in the survey [11]; more recent papers on analog-circuit CAD tools include [4], =-=[12]-=-, [13]. The problem we consider in this paper, i.e., selection of component values and transistor dimensions, is only a part of a complete analog-circuit CAD tool. Other parts, which we do not conside... |

14 |
Geometric Programming-Theory and Application
- Duffin, Prterson, et al.
- 1967
(Show Context)
Citation Context ...imize it, by minimizing (the posynomial) . Geometric programming has been known and used since the late 1960s, in various fields. There were two early books on geometric programming, by Duffin et al. =-=[18]-=- and Zener [106], which include the basic theory, some electrical engineering applications (e.g., optimal transformer design), but not much on numerical solution methods. Another book appeared in 1976... |

14 |
MINOS 5.4 User’s Guide. System Optimization
- Murtagh, Saunders
(Show Context)
Citation Context ...nge multiplier methods, have been widely used in analog-circuit CAD. These methods can be traced back to the survey paper [11]. The widely used general-purpose optimization codes NPSOL [39] and MINOS =-=[71]-=- are used in [25], [64], and [67]. LANCELOT [16], another general-purpose optimizer, is used in [22]. Other CAD approaches based on classical optimization methods, and extensions such as a minimax for... |

13 |
Geometric programming
- Dun, Peterson, et al.
- 1967
(Show Context)
Citation Context ...ry design we have carried out.) However, if the positive PSRR specification becomes critical, it can be approximated (conservatively) by a posynomial inequality, for example, using Du#n linearization =-=[17, 7]-=-. 1.6.4 Noise performance The equivalent input-referred noise power spectral density S in (f) 2 (in V 2 /Hz, at frequency f assumed smaller than the 3dB bandwidth), can be expressed as S 2 in = S 2 1 ... |

12 |
STAIC: An Interactive Framework for Synthesizing CMOS and BiCMOS Analog Circuits
- Harvey, Elmasry, et al.
- 1992
(Show Context)
Citation Context ...approaches based on classical optimization methods, and extensions such as a minimax formulation, include the one described in [62, 46, 60], OAC [77], OPASYN [55], CADICS [53], WATOPT [30], and STAIC =-=[44]-=-. The classical methods can be used with more complicated circuit models, including even full SPICE simulations in each iteration, as in DELIGHT. SPICE [74] (which uses the general purpose optimizer D... |

12 |
Integer programming based topology selection of cell level analog circuits
- Maulik, Carley, et al.
- 1995
(Show Context)
Citation Context ... i.e., selection of component values and transistor dimensions, is only a part of a complete analog circuit CAD tool. Other parts, that we do not consider here, include topology selection (see, e.g., =-=[65]-=-) and actual circuit layout (see, e.g., ILAC [26], KOAN/ANAGRAM II [15]). The part of the CAD process that we consider lies between these two tasks; the remainder of the discussion is restricted to me... |

12 |
Device Electronics for Integrated Circuits, 2nd ed
- Muller, Kamins
- 1986
(Show Context)
Citation Context ...ed in our method. The model, which we refer to as GP0, is essentially the standard long-channel square law model described in, [3] and [41]. This model can be inadequate for short-channel transistors =-=[70]-=-, [91] in which case better models can be developed that still allow optimization via geometric programming (see the Appendix, Section B). 1) Large-Signal Models: Correct operation of the op-amp requi... |