## An Overview of Sigma-Delta Converters: How a 1-bit ADC achieves more than 16-bit resolution (1996)

### BibTeX

@MISC{Aziz96anoverview,

author = {Pervez M. Aziz and Jan Van Der Spiegel and Henrik V. Sorensen},

title = {An Overview of Sigma-Delta Converters: How a 1-bit ADC achieves more than 16-bit resolution },

year = {1996}

}

### OpenURL

### Abstract

### Citations

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Time interleaved converter arrays
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Citation Context ...d much more often and the increase in quantization noise does not merit the gain in the signal power. Parallel Sigma-Delta Systems The use of parallelism for PCM A D conversion has been considered in =-=[49]-=- and [50]. This section very briefly discusses several schemes that use architectural parallelism to improve the performance of sigma-delta modulators AD 80 IEEE SIGNAL PROCESSING MAGAZINE JANUARY 199... |

81 |
Spectra of quantized signals
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- 1948
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Citation Context ...te noise process. Under certain conditions, such as when the quantizer is not overloaded, N is large, and the successive signal values are not excessively correlated, these assumptions are reasonable =-=[4]-=-. Consider an N bit ADC with Q = 2Nquantization levels, i.e., with A= 2V/ Q-1 = 2V/(2N-1). For a zero mean e[n], its variance u,2 or power is If the signal is treated as a zero mean random process and... |

74 |
The Design of Sigma-Delta Modulator Analog-to-Digital Converters
- Boser, Wooley
- 1988
(Show Context)
Citation Context ...n]=x(nTs ) L ....... ---.._I Quantizer 1 Ts = - fs ....~~~._..._ Block diagram and model of a conventional N D converter (ADC) system. of a small sinusoidal input that results in a SNR of 1 (or 0 dB) =-=[5]-=-. The signal power of a full scale sinusoid is V2/2. A sinusoid with signal power U: = 02 = A2/12 will result in an SNRof 1, or 0 dB. The dynamic range, by definition, is (V' -1- A2) (V' -1 (2V/2N)') ... |

59 | Quantization Noise Spectra - Gray - 1990 |

54 | A use of Double Integration in Sigma-Delta Modulation - Candy - 1985 |

42 | A higher order topology for interpolative modulators for oversampling A/D converters - Chao, Nadeem, et al. - 1990 |

35 | Spectral analysis of quantization noise in a single-loop sigma-delta modulator with DC input - Gray - 1989 |

33 |
An analysis of nonlinear behavior in deltasigma modulators
- Ardalan, Paulos
- 1987
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Citation Context ...stability, depend on a time varying and input dependent quantizer gain. An attempt to characterize the quantizer gain more accurately for DC and sinusoidal inputs has been made for several modulators =-=[22]-=-. The phenomenon of limit cycle oscillations is also connected to stability. This is because the structure of limit cycles may be such that the amplitude of internal modulator variables is large, caus... |

30 |
The Structure of Quantization Noise from Sigma-Delta Modulation
- Candy, Benjamin
- 1981
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Citation Context ...uantizer with a noise source, ern], as shown in Fig 8. If the DAC is ideal, it is replaced by a unity gain transfer function. The modulator output Y(z) is then given by: Y(z) = x(z)z-' + E(z)(l- z-1) =-=(10)-=- so that H,(z) = f1 and H,(z) = (1-z-I). The output is just a delayed version of the signal plus quantization noise that has been shaped by a first order 2 domain differentiator or highpass filter. Th... |

28 |
A Unity Bit Coding Method by Negative Feedback
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- 1963
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Citation Context ...H, usually leaves the signal undisturbed but H, shapes the noise to allow a high resolution output [2, 61. Although the term delta-sigma (AX) was used by some of the earliest researchers in the field =-=[7]-=-, the term sigma-delta (XA) has also become almost synonymous with noise shaping ADCs. We will use the term sigma-delta to describe noise shaping ADCs. As noted, oversampling reduces the quanti66 IEEE... |

27 | A high resolution multibit sigma-delta modulator with individual level averaging - Chen, Leung - 1995 |

21 | On the stability of sigmadelta modulators - Hein, Zakhor - 1993 |

18 | An improved sigma-delta modulator architecture - Leslie, Singh - 1990 |

17 | Error diffusion coding for A/D conversion - Anastassiou - 1989 |

16 |
Delta-Sigma modulator based A/D conversion without oversampling
- Galton, Jensen
- 1995
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Citation Context ..., since each octave increment in P amounts to an octave increment in the oversampling ratio of the modulators. Hadamard System Another parallel sigma-delta system has been described in the literature =-=[54]-=- recently. Here, each channel contains a Hadamard modulator, which multiplies the input signal by a ?1 sequence, uk[n]. This operation is called Hadamard modulation. The Hadamard sequences are obtaine... |

13 |
Fiez, “Stability Analysis of High-Order Delta-Sigma Modulation for ADC’s
- Baird, S
- 1994
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Citation Context ...ole moving from the inside to the outside of the unit circle may not necessarily result in unstable behavior in the long term, provided integrator outputs do not saturate before stability is restored =-=[23]-=-. 76 IEEE SIGNAL PROCESSING MAGAZINE JANUARY 1996Suppose an unstable limit cycle, corresponding to poles moving outside the unit circle, results when the quantizer gain is too high, i.e., when the in... |

13 | Multibit sigma-delta A/D converter incorporating a novel class of dynamic element matching technique - Leung, Sutarja - 1992 |

13 |
Oversampling A-to-D and D-toA converters with multistage noise shaping modulators
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- 1988
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Citation Context ...scaded, the cumulative effects of such quantization error leakage effects will yield diminishing returns in performance improvement. Architectures using only first order modulators have been realized =-=[35]-=-, as have architectures using second order modulators [37-391. A comparison of some architectures can also be found in [40]. Finally, note that due to the addition of various single bit intermediate o... |

13 |
A comparison of modulator networks for high-order oversampled analog-to-digital converters
- Ribner
- 1991
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Citation Context ...rovement. Architectures using only first order modulators have been realized [35], as have architectures using second order modulators [37-391. A comparison of some architectures can also be found in =-=[40]-=-. Finally, note that due to the addition of various single bit intermediate outputs, the architecture has a multi-bit final output, which complicates the decimation filter hardware. Band-pass Sigma-De... |

12 |
Bandpass sigma-delta analog-to-digital conversion,” iKA.Sc. l%esis, Thiversity of Toronto
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- 1992
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Citation Context ...e modulator STF and the decimation filter will typically have a band-pass characteristic, providing unity gain over the signal band. As an example, the NTF and STF magnitude spectra for the design in =-=[42]-=- are shown in Fig 18a. In this example, the signal band has a center frequency of fc = 455 kHz,& = 3 MHz, fB = 20 kHz, so the oversampling ratio is 75. Figure 18a shows the magnitude spectra in dB of ... |

11 |
A third-order sigma-delta modulator with extended dynamic range
- Williams, Wolley
- 1994
(Show Context)
Citation Context ...consisting of a cascade of second order and a first order modulator and employing 1 bit quantizers achieves nearly 17 bit performance for a 25 kHz bandwidth, also using an osr of 128 with a&= 6.4 MHz =-=[39]-=-. A sigma-delta converter has also been used as a receiver input of an ISDN U-interface 2B 1Q access rate receiver [16]. The converter attains a dynamic range of 89 dB, or a resolution of 14 bits, for... |

10 | Double-loop sigma-delta modulation with dc input - He, Kuhlmann, et al. - 1990 |

10 | Der Spiegel, “Multiband sigma-delta modulation - Aziz, Sorensen, et al. - 1993 |

9 |
A high-resolution multibit sigmadelta ADC with digital correction and relaxed amplifier requirements
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- 1993
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Citation Context ...dulator with a 4 bit internal ADC and DAC. The converter achieved nearly 16 bit peak SNR for a 20.5 kHz 82 IEEE SIGNAL PROCESSING MAGAZINE JANUARY 1996bandwidth using an osr of 128, or fs = 5.25 MHz =-=[30]-=-. Finally, an architecture consisting of a cascade of second order and a first order modulator and employing 1 bit quantizers achieves nearly 17 bit performance for a 25 kHz bandwidth, also using an o... |

8 |
High-order single-stage single-bit oversampling A/D converter stabilized with local feedback loops
- Moussavi, Leung
- 1994
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Citation Context ... stability would be to reset the integrators if it was detected, by additional circuitry, that their values were becoming too large. However, this approach may cause a significant decrease in the SNR =-=[24]-=-. Similarly, allowing integrator outputs to clip or saturate may also cause degradations in the SNR performance. In particular, low frequency limit cycles which may introduce distortion components in ... |

8 |
A 13 bit ISDN-band oversampled ADC using two-stage third order noise shaping
- Longo, Copeland
- 1988
(Show Context)
Citation Context ... dB, or a resolution of 14 bits, for a 40 kHz bandwidth. A standard 2nd order modulator was used with a 1 bit quantizer running at a 10.24 MHz sampling frequency, and an osr of 128. Another converter =-=[37]-=- used for a similar ISDN U-interface consisted of a cascade of a 2nd order modulator, followed by a 1st order modulator. The resolution was 13 bits, using afs of 2.56 MHz, i.e., an osr of 32. A sigma-... |

8 | Jr., “A 4th-order bandpass sigma-delta modulator - Jantzi, Snelgrove, et al. - 1992 |

7 |
The structure of the limit cycles in sigma-delta modulation
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Citation Context ...antizer has only two output levels, and due to the oversampling, successive quantizer input samples may be correlated. Now consider the existence of limit cycles in the modulator, as has been done in =-=[9]-=- for the simple case of a DC input, x[n] = x. For a limit cycle of period T, v[n] should be periodic with period T, i.e., v[n] = v[n+T]. This clearly implies that Y [nl = Y rn+Tl. For the DC input, th... |

7 |
A 16-b 320-kHz CMOS A/D converter using two-stage third-order noise shaping
- Yin, Stubbe, et al.
- 1993
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Citation Context ...d 250 kHz bandwidths. The 160 kHz bandwidth converter achieves a dynamic range of 96 dB, or nearly 16 bit performance using a cascade of second and first order modulators that employ 1 bit quantizers =-=[38]-=-. The sampling rate ish = 20.48 MHz and the resulting osr is 24. The 250 kHz bandwidth converter achieves 14 bit resolution using a 4th order modulator using a 1 bit quantizer [20]. The osr is 32 and ... |

7 |
Time-interleaved oversampling convertors
- Khoini-Poorfard, Johns
- 1993
(Show Context)
Citation Context ...nal bandwidth converted, f c = fB/P is the bandwidth per channel, P is the number of channels, and Another method for incorporating parallelism into sigmadelta converters is through time interleaving =-=[53]-=-. This architecture employs ideas of block filter theory to use P identical, mutually cross coupled, modulators running at a sampling rate5 to generate the same modulator transfer function, which runs... |

6 | Stability tests for single-bit sigma-delta modulators with second-order FIR noise transfer functions - Schreier, Yang - 1992 |

5 |
Bandpass sigma-delta modulation,” Electronics Letters
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Citation Context ...large, choosing5 to be much greater than the highest frequency will lead to an unreasonably large&, and does not take advantage of the band-pass nature of the signal. Band-pass sigma-delta modulation =-=[41]-=- allows high resolution conversion of band-pass signals if & is much greater than the signal bandwidth fB, rather than the highest signal frequency. Band-pass sigma-delta modulators can be used in AM ... |

5 |
der Spiegel, “ Multi-band sigma-delta analogto-digital conversion
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Citation Context ...rted in parallel. A bank of FIR filters attenuates the out-of-band noise for each band and can achieve perfect reconstruction of the signal component assuming that the modulator STF is a simple delay =-=[52]-=-. A block diagram of the system architecture for four channels is shown in Fig. 22, where ibfk denote the modulators, and Fk(z) and G(z) comprise the digital filter bank. Using Lth order complex band-... |

5 |
Area-Efficient Multichannel Oversampled PCM Voice-Band Coder
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Citation Context ...y the sigma-delta ADC. Sigma-delta converters are good candidates for voiceband (speech) applications where the signal bandwidth is 4 kHz and 13-14 bits of resolution is desirable. One such converter =-=[57]-=- actually used a single bit 1st order modulator with& = 4 MHz, or an OST- of about 500 to achieve a 79 dB dynamic range, i.e., about 13 bits of resolution. Dithering was required to alleviate the tone... |

4 |
et al, “A 16-b 160-kHz CMOS A/D converter using sigma-delta modulation
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Citation Context ... output levels among various stages [2,34]. In fact, mismatch effects and integrator leakage can lead to the propagation of unshaped or poorly shaped noise from an earlier section to the final output =-=[36,40]-=-. Assume there are circuit imperfections in the "1-1" cascade of Fig. 17, such that the transfer function of the integrator in the first section is g z-'/ (l-af') instead of z-'/ (1-z-'). Even if we a... |

4 |
A Sixth-Order Triple-Loop Sigma-Delta CMOS ADC with 90 dB
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Citation Context ...n was 13 bits, using afs of 2.56 MHz, i.e., an osr of 32. A sigma-delta ADC has been used as the baseband converter for a digital cellular radio that required a moderately higher bandwidth of 100 kHz =-=[61]-=-. The converter produced 15 bit peak resolution by using a three stage cascade employing three 2nd order modulators running atfs = 3.25 MHz. The osr was about 16. At somewhat higher bandwidths, high r... |

3 |
Temes, "Oversampling methods for AID and D/A conversion
- Candy, C
- 1992
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Citation Context ...han the resolution of the overall converter. Although sigma-delta concepts have existed since the middle of the century, it is only in the last two decades that this method has become more attractive =-=[2]-=-. One reason is that recent advances in VLSI technology, focused towards realizing high speed densely packed digital circuits, have made feasible the adequate digital processing of the bit stream. Usi... |

3 |
One Bit Higher Order Sigma-Delta A/D Converters
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Citation Context ... at DC frequency can be more efficient in pushing quantization noise outside the signal band. Examples of higher order topologies are described in [18-211. One such fourth order topology described in =-=[19]-=- is shown in Fig 16, where Zk(z) denotes the kth integrator. This structure realizes Eq. 7 in the form Note that the STF and NTF are IIR transfer functions in this case. The feedforward coefficients s... |

3 |
Design aspects of high-order delta-sigma A/D converters
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- 1994
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Citation Context ...not necessary condition for stability, and it has unfortunately been found to be too conservative for practical use. An ad-hoc stability criterion which has been proposed [ 181 and found to be useful =-=[21]-=- is to design the NTF to possess less than 2 to 6 dB of out-of-band gain. Multi-bit Sigma-Delta Modulation Until now, we have assumed that the quantizer and DAC inside our sigma-delta modulator were 1... |

3 |
der Spiegel, “Performance of complex noise transfer functions in bandpass and multi band sigma delta systems
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Citation Context ...[43-451 use real NTFs. Thus, all the coefficients in the Z domain transfer function are real. Let us now discuss the idea of complex band-pass NTFs, which have been proposed independently in [46] and =-=[47]-=-. The use of complex NTFs can improve the resolution that can be obtained for real band-pass signals [47]. The reason for this improvement is best illustrated through an example using second order FIR... |

3 |
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Citation Context ...which will have complex inputs and outputs consisting of real and imaginary parts. Suckampkx integrator can be physically reaIized in switched capacitor technology using two cross coupled integrators =-=[48]-=-. Note there also need to be two physical quantizers, E, and E,, one for the “real” channel and the other for the “imaginary” channel. The Z domain output of the complex modulator is given by VZ) = [X... |

3 | et al, “A stereo 16-bit delta-sigma A/D converter for digital audio - Welland |

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2 |
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Citation Context ...SING MAGAZINE 71(a) 12. NTF for first, second, and third order sigma-delta modulators. (a) Magnitude spectra on linear scale. For comparison, the oversampled PCM NTF, which has unity gain, is shown; =-=(6)-=- magnitude spectra in dB. (b) I Quantizer Discrete time integrator Discrete time inregator : ern1 ~ Second Order Modulation Operation and Pe$ormance Modeling The standard 2nd order sigma-delta modulat... |

2 |
Quantization noise spectrum of double-loop sigma-delta converter with sinusoidal input
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- 1994
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Citation Context ...ume that V = 1, such that the comparator’s digital output is 1 or - I, so that y[n] and y,[n] can be used interchangeably. In the time domain, referring to Fig. 8, we have, v[n] = urn - 11 + v[n - 11 =-=(15)-=- 1 v[n]>O Y [El ={-1 v[n]<O The “error” between the modulator output and input is u[n]. Note that this is not the quantization error, which is given by e[n] = y[n] -v[n]. Since y[n] can take on values... |

2 | Idle channel tones and dithering in delta sigma modulators,” 95th Convention of the Audioengineering Society, preprint 3711 - Norsworthy, Rich - 1993 |

2 |
A CMOS fourth-order 14b 5oOksamplds sigma-delta ADC converter
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Citation Context ...oy 1 bit quantizers [38]. The sampling rate ish = 20.48 MHz and the resulting osr is 24. The 250 kHz bandwidth converter achieves 14 bit resolution using a 4th order modulator using a 1 bit quantizer =-=[20]-=-. The osr is 32 and thus thefsis 32 MHz. At high conversion bandwidths of about 1 MHz, a 12 bit converter has been realized with an osr of about 24, and afs of about 50 MHz [62]. The converter uses a ... |

2 |
Multibit oversampled sigmadelta A/D convertor with digital error correction,” Electronics Letters
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Citation Context ...delay (z-') and a digital differentiator (1 -z-'), respectively. From the Z domain analysis of the linear system model with the DACs replaced by unity gains, we have, Y*(z) = El(z1Z-l + Ez(Z)(l- z-l) =-=(27)-=- The output is computed as Yl z-' - Yz(1-z-'). This sum results in a cancellation of the first order noise term El(z) to produce the overall output, JANUARY 1996 IEEE SIGNAL PROCESSING MAGAZINE 77dis... |

2 | Multibit sigma-deltamodulator with reduced sensitivity to DAC nonlinearity,” Electronics Letters - Zhang - 1991 |

2 |
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Citation Context ...er overload for x[n] bound by 2V. However, the cascaded structure requires matching between the analog and digital transfer functions as well matching among the D/A output levels among various stages =-=[2,34]-=-. In fact, mismatch effects and integrator leakage can lead to the propagation of unshaped or poorly shaped noise from an earlier section to the final output [36,40]. Assume there are circuit imperfec... |