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Modeling and Verifying Systems using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions (0) [100 citations — 27 self]

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@INPROCEEDINGS{Bryant_modelingand,
    author = {Randal E. Bryant and Shuvendu K. Lahiri and Sanjit A. Seshia},
    title = {Modeling and Verifying Systems using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions},
    booktitle = {},
    year = {},
    pages = {78--92},
    publisher = {Springer-Verlag}
}

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Abstract:

In this paper, we present the logic of Counter arithmetic with Lambda expressions and Uninterpreted functions (CLU). CLU generalizes the logic of equality with uninterpreted functions (EUF) with constrained lambda expressions, ordering, and successor and predecessor functions. In addition to modeling pipelined processors that EUF has proved useful for, CLU can be used to model many in finite-state systems including those with infinite memories, finite and infinite queues including lossy channels, and networks of identical processes. Even with this richer expressive power, the validity of a CLU formula can be efficiently decided by translating it to a propositional formula, and then using Boolean methods to check validity. We give theoretical and empirical evidence for the efficiency of our decision procedure. We also describe verification techniques that we have used on a variety of systems, including an out-of-order execution unit and the load-store unit of an industrial microprocessor.

Citations

446	Introduction to HOL: A Theorem Proving Environment for Higher Order Logic – Gordon, Melham - 1993
139	Validity checking for combinations of theories with equality, in M. Srivas & A. Camilleri, eds, `Formal Methods – Barrett, Dill - 1996
123	Solvable Cases of the Decision Problem – Ackermann - 1954
75	Regular model checking – Bouajjani, Jonsson, et al. - 2000
73	Symbolic model checking with rich assertional languages – Kesten, Maler, et al.
62	Super-exponential complexity of Presburger arithmetic – Fischer, Rabin - 1974
54	Cha#: Engineering an e#cient SAT solver – Moskewicz, Madigan, et al. - 2001
51	pvs: A prototype veri system – Owre, Rushby, et al. - 1992
47	The power of QDDs – Boigelot, Godefroid, et al. - 1997
43	Exploiting positive equality in a logic of equality with uninterpreted functions – Bryant, German, et al. - 1999
43	Deciding equality formulas by small domains instantiations – Pnueli, Rodeh, et al. - 1999
32	Deciding separation formulas with SAT – Strichman, Seshia, et al. - 2002
28	Two easy theories whose combination is hard – Pratt - 1977
18	Automatic veri of pipelined microprocessor control – Burch, Dill - 1994
14	Implementation of Fourier-Motzkin elimination – Bik, Wijshoff - 1994
13	Symbolic model checking of in state systems using Presburger arithmetic – Bultan, Gerber, et al.
11	On-the- analysis of systems with unbounded, lossy FIFO channels – Abdulla, Bouajjani, et al.
4	Boolean satis with transitivity constraints – Bryant, Velev - 2000
3	Microarchitecture veri by compositional model checking – Jhala, McMillan - 2001
2	Available at http://www.cs.cmu.edu/~uclid – UCLID
2	Eective use of Boolean satis procedures in the formal veri of superscalar and VLIW microprocessors – Velev, Bryant - 2001