A Constraint-Driven Placement Methodology for Analog Integrated Circuits (1992)
| Venue: | in Proc. IEEE CICC |
| Citations: | 17 - 12 self |
BibTeX
@INPROCEEDINGS{Charbon92aconstraint-driven,
author = {Edoardo Charbon and Enricoo Malavasi and Umakanta Choudhury and Andrea Casotto and Alberto Sangiovanni-Vincentelli},
title = {A Constraint-Driven Placement Methodology for Analog Integrated Circuits},
booktitle = {in Proc. IEEE CICC},
year = {1992},
pages = {2821--2824}
}
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Abstract
this paper we present a placement tool based on the general performance-driven methodology. Automatically generated constraints are used to control a Simulated Annealing placement algorithm, thus trying to insure that the resulting configuration meets all the high-level constraints on performances. Simulated Annealing has been chosen because of the many constraints and cost functions to be included in analog layout that make the use of other placement algorithms very difficult if not impossible. In addition, we have experience in deriving and implementing Simulated Annealing versions for a variety of problems [10, 11, 12, 13]. The algorithm has been used before for analog layout [5], however our approach is significantly different in the way the constraints and cost functions are derived from high-level specifications and in the accurate estimation of layout dependent performances
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