Towards a Formal Semantics of Verilog using Duration Calculus (1998)
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| Venue: | Formal Techniques for Real-Time and Fault Tolerant Systems (FTRTFT'98). LNCS |
| Citations: | 7 - 2 self |
BibTeX
@INPROCEEDINGS{Schneider98towardsa,
author = {Gerardo Schneider and Qiwen Xu},
title = {Towards a Formal Semantics of Verilog using Duration Calculus},
booktitle = {Formal Techniques for Real-Time and Fault Tolerant Systems (FTRTFT'98). LNCS},
year = {1998},
pages = {282--293},
publisher = {Springer-Verlag}
}
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Abstract
We formalise the semantics of V \Gamma , a simple version of Verilog hardware description language using an extension of Duration Calculus. The language is simple enough for experimenting formalisation, but contains sufficient features for being practically relevant. V \Gamma programs can exhibit a rich variety of computations, and it is therefore necessary to extend Duration Calculus with several features, including Weakly Monotonic Time, infinite intervals and fixed point operators. The semantics is compositional and can be used as the formal basis of a formal theory of Verilog. Gerardo Schneider is a fellow of UNU/IIST, on leave from Catholic University of Pelotas, Brazil, where he is a lecturer. Xu Qiwen is a Research Fellow of UNU/IIST. His research interest is in Formal Techniques of Programming, including Theory for Concurrency and Real Time, Verification and Design Calculi. E-mail: qxu@iist.unu.edu Copyright c fl 1998 by UNU/IIST, Gerardo Schneider and Xu Qiwen Contents...
