A Continuous-Time 61 Modulator With 88-dB Dynamic Range and 1.1-MHz Signal Bandwidth
BibTeX
@MISC{Yan_acontinuous-time,
author = {Shouli Yan and Edgar Sánchez-sinencio},
title = {A Continuous-Time 61 Modulator With 88-dB Dynamic Range and 1.1-MHz Signal Bandwidth},
year = {}
}
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Abstract
Abstract—This paper presents the design and experimental results of a continuous-time 61 modulator for ADSL applications. Multibit nonreturn-to-zero (NRZ) DAC pulse shaping is used to reduce clock jitter sensitivity. The nonzero excess loop delay problem in conventional continuous-time 61 modulators is solved by our proposed architecture. A prototype third-order continuous-time 61 modulator with 5-bit internal quantization was realized in a 0.5- m double-poly triple-metal CMOS technology, with a chip area of 2.4 2.4 mm2. Experimental results show that the modulator achieves 88-dB dynamic range, 84-dB SNR, and 83-dB SNDR over a 1.1-MHz signal bandwidth with an oversampling ratio of 16, while dissipating 62 mW from a 3.3-V supply. Index Terms—Analog-to-digital conversion, CMOS analog integrated circuits, continuous-time 61 modulation, multibit internal quantization. I.
