Abstract

This paper addresses some of the architectural limitations and concerns in the development of CMOS high frequency front-ends for wireless communication applications. Different architectures are evaluated as to how well their characteristics suite an all CMOS integrated solution. Also, the comparison aims at important parameters such as low cost, low power, and small feature size. Important receiver architecture characteristics are summarized and compared. It is argued that digital generation of I/Q signal paths provides for a possible performance improvement. To accomplish the IF digitizing a bandpass Delta-Sigma Converter is suggested as a potential solution. I

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