Congestion Reduction during Placement with Provably Good Approximation Bound

Congestion Reduction during Placement with Provably Good Approximation Bound (2001)

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by Xiaojian Yang , Maogang Wang , Ryan Kastner , Soheil Ghiasi , Majid Sarrafzadeh

Venue:	In ICCAD-01
Citations:	3 - 0 self

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@INPROCEEDINGS{Yang01congestionreduction,
    author = {Xiaojian Yang and Maogang Wang and Ryan Kastner and Soheil Ghiasi and Majid Sarrafzadeh},
    title = {Congestion Reduction during Placement with Provably Good Approximation Bound},
    booktitle = {In ICCAD-01},
    year = {2001},
    pages = {316--333}
}

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Abstract

this paper appeared in the Proceedings of 2001 International Conference on Computer-Aided Design (ICCAD)

Citations

159	Gordian: VLSI placement by quadratic programming and slicing optimization - Kleinhans, Sigl, et al. - 1991
97	Can recursive bisection alone produce routable placements - Caldwell, Kahng, et al. - 2000
92	Efficient and effective placement for very large circuits - Sun, Sechen - 1993
66	Estimating routing congestion using probabilistic analysis - Lou, Krishnamoorthy, et al. - 2001
63	RISA: Accurate and Efficient Placement Routability Modeling - Cheng - 1994
54	A Procedure for Placement of Standard Cell VLSI Circuits - Dunlop, Kernighan - 1985
46	Congestion Minimization during Placement - Yang, Sarrafzadeh
30	Congestion Estimation During Top-down Placement - Yang, Kastner, et al. - 2002
29	Sarrafzadeh M., Dragon2000: fast standardcell placement for large circuits - Wang, Yang - 2000
28	Congestion Driven Quadratic Placement - Parakh, Brown, et al. - 1998
27	Performance driven multi-layer general area routing for PCB/MCM designs - Cong, Madden - 1998
23	Congestion-Driven Placement Using a New Multi-Partitioning Heuristic - Meixner, Lauther - 1990
19	Reporting of Standard Cell Placement Results - Madden
12	Requirements for models of achievable routing - Kahng, Mantik, et al. - 2000
8	Multicenter congestion estimation and minimization during placement - Wang, Yang, et al. - 2000
7	Early wirability checking and 2-D congestion-driven circuit placement - Tsay, Chang, et al. - 1992
4	Ecient and eective placement for very large circuits - Sun, Sechen - 1995
4	RISA: Accurate and Ecient Placement Routability Modeling - Cheng - 1994
2	Congestion Minimization During Top-Down Placement - WANG, YANG, et al.
1	Congestion Reduction during Placement • 333 SUN,W.J.AND - SECHEN - 1995