Temporally learning floating-gate VLSI synapses

Temporally learning floating-gate VLSI synapses (2008)

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by Shih-Chii Liu, et al.

BibTeX

@MISC{Liu08temporallylearning,
    author = {Shih-Chii Liu and et al.},
    title = {Temporally learning floating-gate VLSI synapses },
    year = {2008}
}

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Abstract

We present a floating-gate synaptic circuit that updates its weight according to the Spike-Timing-Dependent Plasticity (STDP) rule. The weight (or floating-gate voltage) is updated only if the time difference between the pre- and post-synaptic spikes falls within a learning window. The update is implemented through tunneling and injection mechanisms which can be tuned for very long time constants up to seconds. The novelty of this circuit is that the tunneling and injection mechanisms are turned on only when the correlation of the pre and postsynaptic activity is significant. The additional benefit of this non-volatile technology is that synaptic weights can be stored locally on chip. We present experimental results that show the learning and normalization effects from the fabricated circuits.

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