Abstract

In modern superscalar microarchitectures that speculatively execute a great quantity of code, without performing branch prediction, it won’t be possible to aggressively exploit program’s instruction level parallelism. Both the architectural and technological complexity of current processors emphasizes the negative impact on performance due to every branch missprediction. Due to this importance, branch prediction becomes a core topic in Computer Architecture curricula. The fast development of computer science and information technology domains, and of computer architecture especially, have determined that many software tools used not far ago in research, to be enhanced with an interactive graphical interface and to be taught in Introductory Computer Organization respectively Computer Architecture courses. The lack of simulators dedicated to branch prediction used in didactical purposes despite of plenty used in research goals, represents the starting point of this paper. The main aim of this work consists in identifying the difficult-to-predict branches, quantifying them at benchmarks level and finding the relevant information to reduce their numbers. Finally, we evaluate the impact of these branches on three commonly used

Citations