Combining Advanced Formal Hardware Verification Techniques

Combining Advanced Formal Hardware Verification Techniques (2007)

Cached

Download Links

[www.cs.utexas.edu]

by Erik Henry Reeber

Citations:

1 - 0 self

BibTeX

@TECHREPORT{Reeber07combiningadvanced,
    author = {Erik Henry Reeber},
    title = {Combining Advanced Formal Hardware Verification Techniques},
    institution = {},
    year = {2007}
}

Bookmark

OpenURL

Abstract

Citations

1207	Symbolic Model Checking - McMillan - 1993
909	Chaff: Engineering an efficient SAT solver - Moskewicz, Madigan, et al. - 2001
698	Design and synthesis of synchronization skeletons using branching time temporal logic - Clarke, Emerson - 1981
585	Isabelle/HOL: A Proof Assistant for Higher-Order Logic - Nipkow, Paulson, et al. - 2002
490	PVS: A prototype verification system - Owre, Rushby, et al. - 1992
423	A machine program for theoremproving - Davis, Logemann, et al. - 1962
352	Simplification by cooperating decision procedures - Nelson, Oppen - 1979
297	Computer Organization and Design: The Hardware-Software Interface (Appendix A, by James R - Hennessy, Patterson - 1993
271	A logic programming language with lambda-abstraction, function variables, and simple unification - Miller - 1991
227	Computer-Aided Reasoning: An Approach - Kaufmann, Manolios, et al. - 2000
189	PVS: Combining specification, proof checking, and model checking - Owre, Rajan, et al. - 1996
163	Fast Decision Procedures Based on Congruence Closure - Nelson, Oppen - 1980
143	Deciding combinations of theories - Shostak - 1982
104	Integrating decision procedures into heuristic theorem provers: A case study with linear arithmetic - Boyer, Moore - 1986
102	CVC: A Cooperating Validity Checker - Stump, Barrett, et al. - 2002
90	Specification and verification of concurrent systems - Queille, Sifakis - 1982
88	Verification of an Implementation of Tomasulo’s Algorithm by Compositional Model Checking - McMillan - 1427
79	Validating SAT solvers using an independent resolutionbased checker: Practical implementations and other applications - Zhang, Malik - 2003
75	A decision procedure for bit-vectors and arrays - GANESH, DILL - 2007
69	Effective Use of Boolean Satisfiability Procedures in the Formal Verification of Superscalar and VLIW - Velev, Bryant - 2003
65	FM8501: A Verified Microprocessor - Hunt - 1985
61	Dependently Typed Functional Programs and Their Proofs - McBride - 2000
50	The Coq proof assistant user's guide. Version 5.8 - Dowek, Felty, et al. - 1993
48	A Methodology for Hardware Verification Using Compositional Model Checking - McMillan - 2000
46	Metatheory and reflection in theorem proving: A survey and critique - Harrison - 1995
45	Combining model checking and deduction for I/O-automata. In Brinksma et al Ed (eds) Tools and algorithms for the construction and analysis of systems - Müller, Nipkow - 1995
44	Structured Theory Development for a Mechanized Logic - Kaufmann, Moore
42	Introduction to HOL: a theorem-proving environment for higher-order logic - Gordon, Melham - 1993
39	others. Scaling to the end of silicon with EDGE architectures - Burger, Keckler, et al. - 2004
39	The PROSPER Toolkit - Dennis, Norrish, et al. - 2000
35	Mechanical Verification of Reactive Systems - Manolios - 2001
31	Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving - Aagaard, Jones, et al. - 1999
31	Tassel, ‘Experience with Embedding Hardware Description Languages in HOL - Boulton - 1991
30	An LCF-style interface between HOL and first-order logic - Hurd - 2002
28	C.: The SMT-LIB standard: Version 1.2 - Ranise, Tinelli - 2006
28	A mechanically checked proof of IEEE compliance of the floating point multiplication, division and square root algorithms of the AMD-K7 processor - Russinoff - 1998
27	A formal HDL and its use in the FM9001 verification - Hunt, Brock - 1992
26	Reasoning about terminating functional programs - Slind - 1999
25	The ICS Decision Procedures for Embedded Deduction - Moura, Owre, et al. - 2004
25	Scalable automated verification via expert-system guided transformations - Mony, Baumgartner, et al. - 2004
25	An industrially effective environment for formal hardware verification - Seger, Jones, et al. - 2005
24	2000, ‘Ivy: A Preprocessor and Proof Checker for First-Order Logic - McCune, Shumsky
23	Combining WS1S and HOL - Basin, Friedrich - 2000
21	Programming Combinations of Deduction and BDD-based Symbolic Calculation - Gordon
20	Formal Verification of an Advanced Pipelined Machine - Sawada - 1999
19	The hol-voss system: Model-checking inside a generalpurpose theorem prover - Joyce, Seger - 1993
19	Parameterized verification of the FLASH cache coherence protocol by compositional model checking - McMillan
18	Wired: wireaware circuit design - Axelsson, Claessen, et al. - 2005
18	A Summary of Intrinsic Partitioning Verification - Greve, Richards, et al. - 2004
17	Acceptance of Formal Methods: Lessons from Hardware Design - Dill, Rushby - 1996