## Temporal logics and model checking for fairly correct systems (2006)

Venue: | In Proc. 21st Ann. Symp. Logic in Computer Science (LICS’06 |

Citations: | 7 - 2 self |

### BibTeX

@INPROCEEDINGS{Varacca06temporallogics,

author = {Daniele Varacca},

title = {Temporal logics and model checking for fairly correct systems},

booktitle = {In Proc. 21st Ann. Symp. Logic in Computer Science (LICS’06},

year = {2006},

pages = {389--398},

publisher = {Press}

}

### OpenURL

### Abstract

We motivate and study a generic relaxation of correctness of reactive and concurrent systems with respect to a temporal specification. We define a system to be fairly correct if there exists a fairness assumption under which it satisfies its specification. Equivalently, a system is fairly correct if the set of runs satisfying the specification is large from a topological point of view, i.e., it is a co-meager set. We compare topological largeness with its more popular sibling, probabilistic largeness, where a specification is probabilistically large if the set of runs satisfying the specification has probability 1. We show that topological and probabilistic largeness of ω-regular specifications coincide for bounded Borel measures on finite-state systems. As a corollary, we show that, for specifications expressed in LTL or by Büchi automata, checking that a finite-state system is fairly correct has the same complexity as checking that it is correct. Finally we study variants of the logics CTL and CTL*, where the ‘for all runs ’ quantifier is replaced by a ‘for a large set of runs ’ quantifier. We show that the model checking complexity for these variants is the same as for the original logics. 1