SRFCC: Synthesis of RF CMOS Circuits
BibTeX
@MISC{Kaitharam_srfcc:synthesis,
author = {Subramaniam Kaitharam and Chandrasekar Rajagopal and Adrian Nunez-Aldana},
title = {SRFCC: Synthesis of RF CMOS Circuits},
year = {}
}
Bookmark
 |
 |
 |
 |
 |
 |
OpenURL
Abstract
In this paper, we present a methodology to synthesize CMOS RF devices from high-level circuit specifications into transistor netlists. The core of the methodology is an estimator of RF analog CMOS circuits, which evaluates the performance parameters of various circuit topologies. The estimation engine is based on a hierarchical analog performance estimator and a set of heuristics. The synthesis environment considers all performance parameters into account, and it relies on a genetic algorithm based heuristic method to search for a solution in a large design-space. The synthesis tool determines a solution set of design parameters such that the RF circuit satisfies the overall design constraints.
Citations
| 194 | The design of CMOS radio-frequency integrated circuits, 2nd ed - Lee - 2004 |
| 82 | GAlib: A C ++ Library of Genetic Algorithm Components - Wall - 1996 |
| 49 | Oasys: A framework for analog circuit synthesis - Harjani, Rutenbar, et al. - 1989 |
| 8 | An Analog Performance Estimator for Improving the Effectiveness of CMOS Analog Systems Circuit Synthesis - Nunez, Vemuri - 1999 |
| 8 | The Design and Implementation of LowPower CMOS Radio Receivers - Shaeffer, Lee - 1999 |
| 7 | Behavioral Synthesis of Analog Systems using Two-Layered Design Space Exploration - Doboli, Nunez, et al. - 1999 |
| 4 | IDAC: An Interactive Design Tool for Analog CMOS Circuits - Degrauwe - 1987 |
| 1 | M.Ismail.Optimizing mixer noise performance: a 2.4ghz gilbert down conversion mixer for wcdma application. VLSI: Systems on a Chip - Li, Chunlei - 1999 |
| 1 | 1/f noise modeling and extraction of bsim3 parameters using a new extraction procedure - CMOS - 1999 |
