Abstract

Low power realization of video applications on embedded cores is described. Code transformations are applied to reduce the data memory power consumption. The transformed code indicates a power efficient data memory architecture while transformations move the main part of memory accesses from larger memories (possibly off-chip) to smaller ones (on-chip). The effect of transformations on performance, which is usually the overriding issue in such systems, is evaluated. It is shown that performance is closely related to program memory power consumption that is in some case orders of magnitude larger than data memory power consumption. The aim of the proposed research is the development of a methodology for the application of data storage and transfer optimizing transformations that achieve a close to optimal balance between power and performance in realizations of multimedia applications on embedded cores. 1.

Citations

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