Acceleration of First and Higher Order Recurrences on Processors with Instruction Level Parallelism (1993)
| Venue: | In Sixth International Workshop on Languages and Compilers for Parallel Computing |
| Citations: | 10 - 2 self |
BibTeX
@INPROCEEDINGS{Schlansker93accelerationof,
author = {Michael Schlansker and Vinod Kathail},
title = {Acceleration of First and Higher Order Recurrences on Processors with Instruction Level Parallelism},
booktitle = {In Sixth International Workshop on Languages and Compilers for Parallel Computing},
year = {1993},
pages = {406--429}
}
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Abstract
This report describes parallelization techniques for accelerating a broad class of recurrences on processors with instruction level parallelism. We introduce a new technique, called blocked back-substitution, which has lower operation count and higher performance than previous methods. The blocked back-substitution technique requires unrolling and non-symmetric optimization of innermost loop iterations. We present metrics to characterize the performance of software-pipelined loops and compare these metrics for a range of height reduction techniques and processor architectures.
