Configurable computing solutions for automatic target recognition (1996)
| Venue: | Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines |
| Citations: | 40 - 0 self |
BibTeX
@INPROCEEDINGS{Villasenor96configurablecomputing,
author = {John Villasenor and Brian Schoner and Kang-ngee Chia and Charles Zapata and Hea Joung Kim and Chris Jones and Shane Lansing and Bill Mangione-smith},
title = {Configurable computing solutions for automatic target recognition},
booktitle = {Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines},
year = {1996},
pages = {70--79}
}
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Abstract
FPGAs can be used to build systems for automatic target recognition (ATR) that achieve an order of magnitude increase in performance over systems built using general purpose processors. This improvement is possible because the bit-level operations that comprise much of the ATR computational burden map extremely efficiently into FPGAs, and because the specificity of ATR target templates can be leveraged via fast reconfiguration. We describe here algorithms, design tools, and implementation strategies that are being used in a configurable computing
Citations
| 156 | Processor reconfiguration through instruction-set metamorphosis - Athanas, Silverman - 1993 |
| 110 | A dynamic instruction set computer - Wirthlin, Hutchings - 1995 |
| 36 | Hutchings: Density Enhancement of a Neural Network Using FPGAs and Run Time Reconfiguration - Eldredge, L - 1994 |
| 34 | Teramac – configurable custom computing - Amerson, Carter, et al. - 1995 |
| 26 | Video Communication using rapidly reconfigurable hardware - Villasenor - 1995 |
| 18 | A First Generation DPGA Implementation - Tau, Eslick, et al. - 1995 |
| 12 | High energy physics on DECPeRLe-1 programmable active memory - Moll, Vuillemin, et al. - 1995 |
| 9 | Designing a partially reconfigured system - Hadley, Hutchings - 1995 |
| 1 | DPGA Utilization and Application,” to appear - DeHon - 1996 |
