## Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing (2004)

Venue: | in Proc. of ICCAD |

Citations: | 8 - 1 self |

### BibTeX

@INPROCEEDINGS{Stehr04analogperformance,

author = {Guido Stehr and Helmut Graeb and Kurt Antreich},

title = {Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing},

booktitle = {in Proc. of ICCAD},

year = {2004},

pages = {847--854},

publisher = {IEEE Computer Society}

}

### OpenURL

### Abstract

Analog performance space exploration identifies the range of feasible performance values of a given circuit topology. It is an extremely challenging task of great importance to topology selection and hierarchical sizing. In this paper, a novel technique for the efficient simulation-based exploration of high-dimensional performance spaces is presented. To this end, fundamental circuit design knowledge is described by constraint functions. Based on a linearization of the latter and of the circuit performance functions, a description of the feasible performance range in the form of a polytope is derived. Moreover, the approach is integrated into a hierarchical sizing method, where it propagates topological and technological constraints bottom-up. Practical application results demonstrate the efficiency and usefulness of the new method. 1.

### Citations

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(Show Context)
Citation Context ...ng on the available circuit simulator, this can be simulated directly or by finite differences. Geometrically, the approximation to the feasible parameter space according to (7) represents a polytope =-=[17]-=-, hence its name. (5)s3.2. Linearized Map from Parameter to Performance Space The performance function f(p) can be treated similarly to the constraints in the previous section: f(p) ≈ f(ˆp)+ ∂f(p) � �... |

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Citation Context ...ction along the coordinate axes of the remaining parameters ∆p♦. 3.3.2. Inequality-Based Parameter Elimination To eliminate the remaining (n − q) parameters ∆p♦ from (17), Fourier-Motzkin elimination =-=[3]-=- can be used. This elimination technique for inequalities bears some resemblance to Gaussian elimination for equations. It is described in detail in Sec. 4. This second elimination step leads to K · ∆... |

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Citation Context ...s in saturation without going into detail [13, 16]. A few publications, especially on knowledgebased or symbolic approaches, discuss additional constraints like symmetry, matching or maximum currents =-=[5, 10]-=-. An automatic, even more comprehensive constraint setup is described in [9]: For example, the operating conditions of transistors in a current mirror must not differ significantly and their current r... |

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Citation Context ...on is extraordinarily challenging in terms of computational costs. A number of performance space exploration techniques have been published so far. To calculate the circuit performances, some of them =-=[6, 11]-=- rely on symbolic equations, which partially require a laborious manual setup. Others [13, 14] use detailed circuit simulation, which is flexible and accurate, but slow. As a common denominator, all t... |

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Citation Context ...ls of abstraction, requires a high-dimensional description of the achievable performance values of the available functional blocks. While this problem is frequently mentioned in the literature, e. g. =-=[1, 11]-=-, hardly any general solution to it has been presented so far. Using the example of a filter design, we show how our performance space exploration technique is a key enabler for hierarchical sizing. T... |

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Citation Context ...s in saturation without going into detail [13, 16]. A few publications, especially on knowledgebased or symbolic approaches, discuss additional constraints like symmetry, matching or maximum currents =-=[5, 10]-=-. An automatic, even more comprehensive constraint setup is described in [9]: For example, the operating conditions of transistors in a current mirror must not differ significantly and their current r... |

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Citation Context ...s of accuracy. Although Fourier-Motzkin elimination has been known for a long time, it has only recently gained increased attention in the area of combinatorial optimization and compiler optimization =-=[2, 12]-=-. However, these algorithms are inapplicable in this context because they are geared towards discrete problems. Therefore, we developed a dedicated Fourier-Motzkin elimination algorithm, which meets t... |

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Citation Context ...collectively, are called sizing constraints. They always comprise lower and upper bounds for the individual designable parameters of the circuit, such as minimum and maximum transistor gate sizes. In =-=[4, 7]-=-, for example, any circuit, that satisfies these box constraints and that can be simulated successfully, is considered feasible. Going beyond that, most authors agree on keeping transistors in saturat... |

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Citation Context ...ace exploration techniques have been published so far. To calculate the circuit performances, some of them [6, 11] rely on symbolic equations, which partially require a laborious manual setup. Others =-=[13, 14]-=- use detailed circuit simulation, which is flexible and accurate, but slow. As a common denominator, all these approaches are adapted for nonlinear circuit behavior in order to achieve a good degree o... |

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Citation Context ...ly on knowledgebased or symbolic approaches, discuss additional constraints like symmetry, matching or maximum currents [5, 10]. An automatic, even more comprehensive constraint setup is described in =-=[9]-=-: For example, the operating conditions of transistors in a current mirror must not differ significantly and their current ratios must not deviate too far from their channel width ratios.sSizing const... |

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Citation Context ...on is extraordinarily challenging in terms of computational costs. A number of performance space exploration techniques have been published so far. To calculate the circuit performances, some of them =-=[6, 11]-=- rely on symbolic equations, which partially require a laborious manual setup. Others [13, 14] use detailed circuit simulation, which is flexible and accurate, but slow. As a common denominator, all t... |

9 |
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Citation Context ...ace exploration techniques have been published so far. To calculate the circuit performances, some of them [6, 11] rely on symbolic equations, which partially require a laborious manual setup. Others =-=[13, 14]-=- use detailed circuit simulation, which is flexible and accurate, but slow. As a common denominator, all these approaches are adapted for nonlinear circuit behavior in order to achieve a good degree o... |

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Citation Context ...s of accuracy. Although Fourier-Motzkin elimination has been known for a long time, it has only recently gained increased attention in the area of combinatorial optimization and compiler optimization =-=[2, 12]-=-. However, these algorithms are inapplicable in this context because they are geared towards discrete problems. Therefore, we developed a dedicated Fourier-Motzkin elimination algorithm, which meets t... |

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(Show Context)
Citation Context ...tion. In our experiments, we obtained good results with the linearization point located in the center of the feasible parameter space P . An algorithm to reliably identify this point was presented in =-=[15]-=-. If more accurate performance space descriptions are wanted, they can be computed nonlinearly, if the computational resources allow it [13, 14]. 3.1. Polytopal Feasible Parameter Space In the neighbo... |

2 |
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Citation Context ...collectively, are called sizing constraints. They always comprise lower and upper bounds for the individual designable parameters of the circuit, such as minimum and maximum transistor gate sizes. In =-=[4, 7]-=-, for example, any circuit, that satisfies these box constraints and that can be simulated successfully, is considered feasible. Going beyond that, most authors agree on keeping transistors in saturat... |

2 |
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Citation Context ...e following, we demonstrate a hierarchical sizing approach featuring two levels of abstraction. In Fig. 8, an operational transconductance amplifier (OTA) is given in the form of a transistor netlist =-=[8]-=-. In the following, this level of abstraction is referred to as block level. Accordingly, the designable OTA parameters p are called block parameters. They comprise the widths and lengths of the trans... |

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Citation Context ...at satisfies these box constraints and that can be simulated successfully, is considered feasible. Going beyond that, most authors agree on keeping transistors in saturation without going into detail =-=[13, 16]-=-. A few publications, especially on knowledgebased or symbolic approaches, discuss additional constraints like symmetry, matching or maximum currents [5, 10]. An automatic, even more comprehensive con... |