DMCA

64 KByte sum-addressed-memory cache with 1.6 ns cycle and 2.6 ns latency (1998)

by Raymond Heald , Ken Shin , Vinita Reddy , I-feng Kao , Masood Khan , William L. Lynch , Gary Lauterbach , Joe Petolino
Venue:Digest of Technical Papers, IEEE International Solid-State Circuits Conference
Citations:4 - 0 self