## Robust analog/RF circuit design with projection-based posynomial modeling (2004)

### Cached

### Download Links

- [www.ece.cmu.edu]
- [users.ece.cmu.edu]
- [www.ece.cmu.edu]
- [users.ece.cmu.edu]
- DBLP

### Other Repositories/Bibliography

Venue: | IEEE/ACM ICCAD |

Citations: | 21 - 9 self |

### BibTeX

@INPROCEEDINGS{Li04robustanalog/rf,

author = {Xin Li and Padmini Gopalakrishnan and Yang Xu and Lawrence T. Pileggi},

title = {Robust analog/RF circuit design with projection-based posynomial modeling},

booktitle = {IEEE/ACM ICCAD},

year = {2004},

pages = {855--862},

publisher = {Circuits}

}

### OpenURL

### Abstract

In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthesis based on simplified models, ROAD extracts accurate posynomial performance models via transistor-level simulation and optimizes the circuit by geometric programming. Importantly, ROAD sets up all design constraints to include large-scale process variations to facilitate the tradeoff between yield and performance. A novel convex formulation of the robust design problem is utilized to improve the optimization efficiency and to produce a solution that is superior to other local tuning methods. In addition, a novel projection-based approach for posynomial fitting is used to facilitate scaling to large problem sizes. A new implicit power iteration algorithm is proposed to find the optimal projection space and extract the posynomial coefficients with robust convergence. The efficacy of ROAD is demonstrated on several circuit examples. 1.

### Citations

4084 |
Convex Optimization
- Boyd, Vandenberghe
- 2004
(Show Context)
Citation Context ...isfying all other constraints {fi(X) ≤ 1, i=1, 2,...,K} and {xj > 0, j=1, 2,...,M}. The optimization in (2) can be converted into a convex programming problem and solved in an extremely efficient way =-=[11]-=-. Geometric programming has been previously applied to parametric analog optimization in [8]–[10]. However, these approaches optimize analog/RF circuits using simplified models, which is similar to us... |

2100 |
Matrix computations
- Golub, Loan
- 1983
(Show Context)
Citation Context ...han what are feasible with current modeling techniques. In addition, while the traditional projection theory generally trades accuracy for simplicity in terms of the dimension of the projection space =-=[26]-=-, [27], we find that the rank-one projection is especially meaningful in our application. Our theoretical analysis proves that a quadratic polynomial/posynomial is invariant (i.e., remains a polynomia... |

1673 |
Iterative Methods for Sparse Linear Systems
- SAAD
- 2003
(Show Context)
Citation Context ...F of the sum of the squares of all matrix elements. For simplicity, we assume that A is symmetric in this paper. Any asymmetric quadratic form can be easily converted to the equivalent symmetric form =-=[17]-=-. n�n From matrix theory [18], for any symmetric matrix A � R , the optimal rank-p approximation with the least Frobenius-norm error is: A L � p � i�1 T i Pi Pi � (6) �1 � n where � i is the i-th domi... |

479 |
Empirical ModelBuilding and Responses Surfaces
- Box, Drapper
- 1987
(Show Context)
Citation Context ...], the novelty of ROAD lies in a projection-based approach for quadratic performance (both polynomial and posynomial) modeling. Instead of fitting a full-rank quadratic model, as is currently done in =-=[20]-=-–[25], ROAD applies a projection operator with the goal of obtaining an optimal low-rank model by minimizing the approximation error. With this novel projection scheme, ROAD is able to dramatically re... |

406 |
Response Surface Methodology: Process and Product Optimization Using Designed Experiments
- Myers, Montomery
- 1995
(Show Context)
Citation Context ...ent fitting, but we can also significantly reduce the circuit simulation cost due to the smaller training set. Table II summarizes the response surface modeling accuracy for both direct fitting [20], =-=[21]-=- and ROAD. The modeling error in Table II is measured using the same testing set that contains 500 random sampling points. Studying Table II, we find that no significant accuracy is surrendered by usi... |

299 |
Multivariate Observations
- Seber
- 1984
(Show Context)
Citation Context .... Low-Noise Amplifier (LNA) Fig. 9 shows a LNA designed in the IBM BiCMOS 0.25-µm process. The LNA circuit includes 12 design variables and 8 design specifications. Principal component analysis (PCA) =-=[33]-=- is applied to extract the principal factors of the random process variations based on the probability distributions and the correlation information obtained from the IBM design kit. In addition, vari... |

123 |
Orthogonal arrays: Theory and Applications
- Hedayat, Sloane, et al.
- 1999
(Show Context)
Citation Context ... and then successively reduced to 1% during iteration. Two independent sampling sets, called training set and testing set respectively, are generated. The training set is created by orthogonal arrays =-=[20]-=-, which pick up the most important samples based on statistical analysis; this is used for posynomial coefficient fitting. For testing and comparison, we collect 500 random samples as the testing set ... |

66 | Optimal design of a CMOS op-amp via geometric programming
- Hershenson, Boyd, et al.
- 2001
(Show Context)
Citation Context ...alog/RF circuits are typically designed and verified through several iterations. To address this increasing difficulty of manual design, various approaches have been proposed for analog synthesis [1]-=-=[8]-=-. These methods take a fixed circuit topology as input and optimize the component sizes to meet design specifications. Advanced stochastic algorithms such as simulated annealing and genetic programmin... |

61 |
Computer–aided design of analog and mixed–signal integrated circuits
- Gielen, Rutenbar
- 2000
(Show Context)
Citation Context ...s analog/RF circuits are typically designed and verified through several iterations. To address this increasing difficulty of manual design, various approaches have been proposed for analog synthesis =-=[1]-=--[8]. These methods take a fixed circuit topology as input and optimize the component sizes to meet design specifications. Advanced stochastic algorithms such as simulated annealing and genetic progra... |

52 |
DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits
- Nye, Riley, et al.
- 1988
(Show Context)
Citation Context ...been proposed for parametric analog optimization [1]–[10]. These methods take a fixed circuit topology as input and optimize the device sizes to meet design specifications. For example, DELIGHT.SPICE =-=[2]-=- is an optimization engine that utilizes a gradient-based algorithm to locally optimize the circuit. Advanced stochastic search algorithms such as simulated annealing and genetic programming have also... |

37 | Asymptotic probability extraction for non-normal distributions of circuit performance
- Li, Le, et al.
- 2004
(Show Context)
Citation Context ...for each , the lower bound circuit performance: the mean value f M �x� f LOW �x� and the upper bound fUP �x� values of these three metrics f M �x�, f LOW �x� and �x� be computed by the APEX algorithm =-=[19]-=-. PDF f M �x� f LOW �x� , as shown in Fig. 4. The fUP �x� f �x� f UP can Fig. 4. Probability density function of performance f �x�. ROAD classifies all design specifications into two categories: equal... |

36 | MAELSTROM: efficient simulation-based synthesis for custom analog cells
- Krasnicki, Phelps, et al.
- 1999
(Show Context)
Citation Context ...s to meet design specifications. Advanced stochastic algorithms such as simulated annealing and genetic programming have been applied to search the entire design space for a globally optimal solution =-=[2]-=--[4]. However, stochastic search algorithms can be very slow, especially when process variations are simultaneously considered [5]. Recently, it has been demonstrated that many analog circuit specific... |

36 |
Circuit Analysis and Optimization Driven by Worst–Case Distances
- Antreich, Graeb, et al.
- 1994
(Show Context)
Citation Context ...ocess and environmental variations for analog sizing [12]–[19]. These techniques can be classified into four categories in general, namely: 1) direct yield optimization [12]–[14]; 2) design centering =-=[15]-=-, [16]; 3) worst case optimization [17], [18]; and 4) infinite programming [19]. Direct yield optimization methods maximize the parametric yield that is estimated by either numerical integration or Mo... |

33 | ANACONDA: Simulation-based synthesis of analog circuits via stochastic pattern search - Phelps, Krasnicki, et al. - 2000 |

31 | Optimization of inductor circuits via geometric programming
- Hershenson, Mohan, et al.
- 1999
(Show Context)
Citation Context ...ications can be cast into posynomial functions. As such, analog circuit sizing can be formulated as a geometric programming problem which guarantees that a globally optimal solution can be determined =-=[6]-=--[8]. However, the traditional geometric programming approach requires the creation of the posynomial design equations by hand. Manually derived equations apply various simplifications and ignore many... |

24 | Mismatch analysis and direct yield optimization by spec-wise linearization and feasibilityguided search
- Schenkel, Pronath, et al.
- 2001
(Show Context)
Citation Context ...lied with detailed device/coupling/variation models to perform a more finegrained search and optimize the tradeoff between yield and performance. Compared with other robust design approaches [5], [9]-=-=[11]-=-, the novelty of ROAD lies in our convex formulation of the robust design problem, which improves the optimization efficiency and, more importantly, helps to find a better solution. We find that, even... |

21 | Worst-case analysis and optimization of VLSI circuit performances
- Dharchoudhury, Kang
- 1995
(Show Context)
Citation Context ...analog sizing [12]–[19]. These techniques can be classified into four categories in general, namely: 1) direct yield optimization [12]–[14]; 2) design centering [15], [16]; 3) worst case optimization =-=[17]-=-, [18]; and 4) infinite programming [19]. Direct yield optimization methods maximize the parametric yield that is estimated by either numerical integration or Monte Carlo analysis. Design centering ap... |

21 |
The sizing rules method for analog integrated circuit design
- Graeb, Zizala, et al.
- 2001
(Show Context)
Citation Context ... It is theoretically guaranteed that stochastic search algorithms can find the global optimum after they visit a sufficiently large number of design points in the design space. Recently, Graeb et al. =-=[28]-=- and Stehr et al. [29] proposed the concept of feasible region that is defined by a set of implicit topology-given specifications—e.g., MOSFETs should stay in the saturation region in order to provide... |

17 | Efficient analog circuit synthesis with simultaneous yield and robustness optimization
- Debyser, Gielen
- 1998
(Show Context)
Citation Context ... sizing [12]–[19]. These techniques can be classified into four categories in general, namely: 1) direct yield optimization [12]–[14]; 2) design centering [15], [16]; 3) worst case optimization [17], =-=[18]-=-; and 4) infinite programming [19]. Direct yield optimization methods maximize the parametric yield that is estimated by either numerical integration or Monte Carlo analysis. Design centering approach... |

17 | BProjection-based performance modeling for inter/intra-die variations - Li, Le, et al. - 2005 |

14 |
Statistical integrated circuit design
- Director, Feldmann, et al.
- 1993
(Show Context)
Citation Context ... occur at one of these corners. During the past two decades, many statistical optimization approaches have been proposed to statistically handle process and environmental variations for analog sizing =-=[12]-=-–[19]. These techniques can be classified into four categories in general, namely: 1) direct yield optimization [12]–[14]; 2) design centering [15], [16]; 3) worst case optimization [17], [18]; and 4)... |

12 | ASF: a practical simulation-based methodology for the synthesis of custom analogue circuits
- Krasnicki, Phelps, et al.
(Show Context)
Citation Context ... meet design specifications. Advanced stochastic algorithms such as simulated annealing and genetic programming have been applied to search the entire design space for a globally optimal solution [2]-=-=[4]-=-. However, stochastic search algorithms can be very slow, especially when process variations are simultaneously considered [5]. Recently, it has been demonstrated that many analog circuit specificatio... |

12 | An efficient yield optimization method using a two step linear approximation of circuit performance - Wang, Director - 1994 |

11 |
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuits
- Daems, Gielen, et al.
- 2001
(Show Context)
Citation Context ...onverge to an accurate design with high yield.sAnother novelty of ROAD is the utilization of a projectionbased approach for posynomial fitting. Compared with traditional posynomial fitting techniques =-=[12]-=--[15], the proposed projectionbased method is more efficient and handles large-size problems. While the traditional projection theory generally trades accuracy for simplicity in terms of the dimension... |

10 | AMGIE—A synthesis environment for CMOS analog integrated circuits - Plas, Debyser, et al. - 2001 |

8 | An efficient optimizationbased technique to generate posynomial performance models for analog integrated circuits
- Daems, Gielen, et al.
- 2002
(Show Context)
Citation Context ...ace for post-tuning. Several techniques have been proposed for quadratic posynomial model generation [12]-[15]. Considering the tradeoff between modeling accuracy and computation cost, direct fitting =-=[14]-=- is the most efficient of these previous approaches. Direct fitting approximates the posynomial function by a quadratic form: T T f x � X AX � B X � (4) � � C where � �T 1 1 X x �, x , x , �, x � � � ... |

8 | Design and optimization of LC oscillators - Hershenson - 1999 |

7 |
Efficient handling of operating range and manufacturing line variations in analog cell synthesis
- Mukherjeee, Carley, et al.
- 2000
(Show Context)
Citation Context ...ied to search the entire design space for a globally optimal solution [2]-[4]. However, stochastic search algorithms can be very slow, especially when process variations are simultaneously considered =-=[5]-=-. Recently, it has been demonstrated that many analog circuit specifications can be cast into posynomial functions. As such, analog circuit sizing can be formulated as a geometric programming problem ... |

7 |
A high–level simulation and synthesis environment for ∆Σ modulators
- Francken, Gielen
- 2003
(Show Context)
Citation Context ...ize the circuit. Advanced stochastic search algorithms such as simulated annealing and genetic programming have also been applied to search the entire design space for a globally optimal solution [3]–=-=[7]-=-. Compared with gradientbased approaches, these stochastic search algorithms typically yield better optimization results at the expense of increased computational cost. Recent research [8]–[10] has de... |

7 |
A unified approach to statistical design centering of integrated circuits with correlated parameters
- Seifi, Ponnambalam, et al.
- 1999
(Show Context)
Citation Context ...and environmental variations for analog sizing [12]–[19]. These techniques can be classified into four categories in general, namely: 1) direct yield optimization [12]–[14]; 2) design centering [15], =-=[16]-=-; 3) worst case optimization [17], [18]; and 4) infinite programming [19]. Direct yield optimization methods maximize the parametric yield that is estimated by either numerical integration or Monte Ca... |

6 |
An efficient methodology for building macromodels of ic fabrication processes
- Low, Director
- 1989
(Show Context)
Citation Context ...extract the principal factors of the random process variations based on the probability distributions and the correlation information obtained from the IBM design kit. In addition, variable screening =-=[34]-=- is further utilized to identify a subset of the random process parameters that have much greater influence on circuit performance than the others. After PCA and Fig. 11. Effect of the training set si... |

5 | Generalized posynomial performance modeling - Eeckelaert, Daems, et al. |

5 | Initial sizing of analog integrated circuits by centering within topology-given implicit specifications
- Stehr, Pronath, et al.
- 2003
(Show Context)
Citation Context ...uaranteed that stochastic search algorithms can find the global optimum after they visit a sufficiently large number of design points in the design space. Recently, Graeb et al. [28] and Stehr et al. =-=[29]-=- proposed the concept of feasible region that is defined by a set of implicit topology-given specifications—e.g., MOSFETs should stay in the saturation region in order to provide the correct analog fu... |

1 | A fitting approach to generate synbolic expressions for linear and nonlinear analog circuit performance characteristics - Daems, Gielen, et al. - 2002 |

1 | fitting approach to generate symbolic expressions for linear and nonlinear analog circuit performance characteristics - “A |

1 |
efficient optimization-based technique to generate posynomial performance models for analog integrated circuits
- “An
(Show Context)
Citation Context ...n in (1). Several previous techniques have been proposed for quadratic posynomial model generation [22]–[25]. Considering the tradeoff between modeling accuracy and computational cost, direct fitting =-=[24]-=- is one of the most efficient approaches. Direct fitting approximates a posynomial function by the following quadratic form: f(X) = ˜ X T Ã ˜ X + ˜ B T ˜ X + ˜ C (6) where X =[x1,x2,...,xM ] T contain... |