## Experience with embedding hardware description languages in HOL (1992)

Venue: | Theorem Provers in Circuit Design |

Citations: | 38 - 4 self |

### BibTeX

@INPROCEEDINGS{Boulton92experiencewith,

author = {Richard Boulton and Andrew Gordon and Mike Gordon and John Harrison and John Herbert and John Van Tassel},

title = {Experience with embedding hardware description languages in HOL},

booktitle = {Theorem Provers in Circuit Design},

year = {1992},

pages = {129--156},

publisher = {North-Holland}

}

### Years of Citing Articles

### OpenURL

### Abstract

Abstract The semantics of hardware description languages can be represented in higher order logic. This provides a formal definition that is suitable for machine processing. Experiments are in progress at Cambridge to see whether this method can be the basis of practical tools based on the HOL theorem-proving assistant. Three languages are being investigated: ELLA, Silage and VHDL. The approaches taken for these languages are compared and current progress on building semantically-based theorem-proving tools is discussed.

### Citations

1570 | The definition of Standard ML
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Citation Context ... project is to support experimental discovery of a tuned program, by incremental transformation from an initial program. 8.5 The formal definition The method of Structural Operational Semantics (SOS) =-=[28, 31]-=- is used to formalize the type-checking and translation processes for Silage. Existing descriptions of Silage [17, 27, 30] make the concrete syntax precise using BNF rules, but leave semantic issues s... |

1288 | A Structural Approach to Operational Semantics
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- 1981
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Citation Context ... project is to support experimental discovery of a tuned program, by incremental transformation from an initial program. 8.5 The formal definition The method of Structural Operational Semantics (SOS) =-=[28, 31]-=- is used to formalize the type-checking and translation processes for Silage. Existing descriptions of Silage [17, 27, 30] make the concrete syntax precise using BNF rules, but leave semantic issues s... |

854 |
A formulation of a simple theory of types
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Citation Context ...nctions and predicates (types are required to avoid inconsistency). Higher order logics differ in the sophistication of the type system they provide. One of the simplest type systems is due to Church =-=[3]-=- and is similar to the programming language type disciplines found in functional languages like ML and Miranda. This is the system that underlies the work described here, but knowledge of the details ... |

203 |
HOL: A proof generating system for higher-order logic
- Gordon
- 1988
(Show Context)
Citation Context ...uages (HDLs) within a general theoremproving environment. The approach taken is semantic embedding in higher order logic [13, 19], and the theorem-proving infrastructure is provided by the HOL system =-=[12]-=-. Three languages are being investigated by separate teams: ELLA (by Boulton, Harrison and Herbert), Silage (by A. Gordon) and VHDL (by Van Tassel). The HOL-ELLA project [1] is the largest effort and ... |

131 |
Edinburgh LCF: A mechanised logic of computation
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- 1979
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Citation Context ...jects on transformational design have constructed systems programmed from scratch [5, 6]. The advantage of building a system for transformational design on top of an LCF-style theorem prover like HOL =-=[10]-=-, in which programs are represented by their logical meaning and transformations can only be obtained by logical inference, is that then there is no fear that programming errors can lead to invalid tr... |

89 |
Why higher-order logic is a good formalism for specifying and verifying hardware
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Citation Context ....1; B.7.2; I.2.3 Keywords: Mathematical Logic; Integrated Circuits, Design Aids; Deduction and Theorem Proving. 1 Introduction Hardware can be directly specified in the notation of mathematical logic =-=[11, 14, 18]-=-, but this form is unacceptable to many designers and is also unsuitable for input to CAD tools such as simulators and circuit synthesizers. The work described here aims to support the use of conventi... |

74 | Automating recursive type definitions in higher order logic
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- 1989
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Citation Context ...ew tool developed by Tom Melham [26]. It includes concurrent process statements, simple sequential statements and general Boolean expressions. The syntax is described in the logic as a recursive type =-=[25]-=-. Process statements are the outermost level, and contain sequential statements which may make use of Boolean expressions. Given this rather terse summary of syntax, our running example would take on ... |

58 | Mechanising Programming Logics in Higher Order Logic
- Gordon
- 1988
(Show Context)
Citation Context ...escribed here aims to support the use of conventional hardware description languages (HDLs) within a general theoremproving environment. The approach taken is semantic embedding in higher order logic =-=[13, 19]-=-, and the theorem-proving infrastructure is provided by the HOL system [12]. Three languages are being investigated by separate teams: ELLA (by Boulton, Harrison and Herbert), Silage (by A. Gordon) an... |

29 |
The Mechanical Verification of a Microprocessor Design
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- 1986
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Citation Context ....1; B.7.2; I.2.3 Keywords: Mathematical Logic; Integrated Circuits, Design Aids; Deduction and Theorem Proving. 1 Introduction Hardware can be directly specified in the notation of mathematical logic =-=[11, 14, 18]-=-, but this form is unacceptable to many designers and is also unsuitable for input to CAD tools such as simulators and circuit synthesizers. The work described here aims to support the use of conventi... |

28 | A Package for Inductive Relation Definitions in HOL
- Melham
- 1991
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Citation Context ...pes are modelled using corresponding type definitions in higher order logic. These are not primitive in HOL, but are made available in terms of primitive types using a procedure written by Tom Melham =-=[26]-=-. These primitive types may be built up into composites, which may be thought of as representing collections of wires such as buses. These are modelled as lists or tuples in HOL, depending on precise ... |

23 |
Specification and verification using higher-order logic: A case study
- Hanna, Daeche
- 1986
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Citation Context ....1; B.7.2; I.2.3 Keywords: Mathematical Logic; Integrated Circuits, Design Aids; Deduction and Theorem Proving. 1 Introduction Hardware can be directly specified in the notation of mathematical logic =-=[11, 14, 18]-=-, but this form is unacceptable to many designers and is also unsuitable for input to CAD tools such as simulators and circuit synthesizers. The work described here aims to support the use of conventi... |

22 |
DSP specification using the Silage language
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- 1990
(Show Context)
Citation Context ... some imperative features. These require some notion of state within the semantics, whereas for the purely functional subset it is possible to give a semantics in terms of types and functions. Silage =-=[7, 16, 17]-=- is a small dataflow language designed for specifying digital signal processing (DSP) devices. There are several dialects of Silage and no agreed standard; the HOL-Silage project deals with the IMEC d... |

19 | Using recursive types to reason about hardware in higher order logic
- Melham
- 1988
(Show Context)
Citation Context ...e respectively. Each of these has advantages and disadvantages. The advantage of deep embedding is that it allows reasoning about classes of programs, since one can quantify over syntactic structures =-=[24]-=-. Setting up HOL types of abstract syntax and semantic functions can be a lot of work. The advantage of shallow embedding is that this work is avoided; the interface handles the mapping between HDL pr... |

15 |
Cathedral-II: A Silicon Compiler for
- Man, Rabaey, et al.
- 1986
(Show Context)
Citation Context ...at IMEC is to develop a Silage program using a software simulator [30], and then to synthesize for a particular architecture -- bit-serial or microcoded -- with one of the CATHEDRAL synthesis systems =-=[23]-=-. Silicon compilers such as CATHEDRAL can cope mechanically with all the details of mapping a Silage program's high-level behavioural description to a low-level implementation, but they cannot current... |

13 |
A functional programming environment supporting execution, partial execution and transformation
- Darlington
- 1989
(Show Context)
Citation Context ...descriptions from the start, so that compilers can be programmed in styles suitable for formal verification. Other projects on transformational design have constructed systems programmed from scratch =-=[5, 6]-=-. The advantage of building a system for transformational design on top of an LCF-style theorem prover like HOL [10], in which programs are represented by their logical meaning and transformations can... |

11 | Tassel. The HOL verification of ELLA designs
- Boulton, Gordon, et al.
- 1991
(Show Context)
Citation Context ...rovided by the HOL system [12]. Three languages are being investigated by separate teams: ELLA (by Boulton, Harrison and Herbert), Silage (by A. Gordon) and VHDL (by Van Tassel). The HOL-ELLA project =-=[1]-=- is the largest effort and has been running longest. The other two projects have benefited from experience and tools arising from early experiments with ELLA. Note that none of the three languages con... |

7 |
Silage, a high-level language and silicon compiler for digital signal processing
- Hilfinger
- 1985
(Show Context)
Citation Context ... some imperative features. These require some notion of state within the semantics, whereas for the purely functional subset it is possible to give a semantics in terms of types and functions. Silage =-=[7, 16, 17]-=- is a small dataflow language designed for specifying digital signal processing (DSP) devices. There are several dialects of Silage and no agreed standard; the HOL-Silage project deals with the IMEC d... |

4 |
The Formal Definition of a Synchronous Hardware-Description Language in Higher Order Logic
- Gordon
- 1992
(Show Context)
Citation Context ... apart from the others is the emphasis on a formal account of the language definition itself. This section is partly based on material from the definition of the HOL-Silage subset [8] and its summary =-=[9]-=-. Section 8.1 introduces transformational design of Silage programs, the motivation for the HOL-Silage project. The language is introduced in Section 8.2 by way of the parity checker example. Section ... |

4 |
Tassel, “A formalisation of the VHDL simulation cycle
- Van
- 1992
(Show Context)
Citation Context ...ess, while a simulation cycle is performed each time around the loop to schedule transactions for the future. Only the flavour of the semantics is discussed here. The interested reader is directed to =-=[34]-=- for a more complete exposition. The semantics has been written as a collection of transition relations, in the style of [31], which describe the simulation algorithm and the interaction of various VH... |

3 |
Simulating hardware specifications within a theorem proving environment
- Camilleri
- 1990
(Show Context)
Citation Context ...e approach taken here, is to develop CAD tools such as simulators and synthesizers that act directly on logic representations and thereby avoid the need for the kind of effort described in this paper =-=[2, 18, 21]-=-. In the meantime it is essential for HDLs to be modelled in logic if theorem-proving is to be applicable to hardware design. Acknowledgements Richard Boulton, John Harrison and John Herbert were supp... |

3 |
FIDIL reference manual
- Hilfinger, Colella
- 1993
(Show Context)
Citation Context ... some imperative features. These require some notion of state within the semantics, whereas for the purely functional subset it is possible to give a semantics in terms of types and functions. Silage =-=[7, 16, 17]-=- is a small dataflow language designed for specifying digital signal processing (DSP) devices. There are several dialects of Silage and no agreed standard; the HOL-Silage project deals with the IMEC d... |

2 |
Using Nuprl for the verification and synthesis of hardware', in Mechanized Reasoning and Hardware Design: a Discussion Meeting held at the Royal Society
- Leeser
- 1991
(Show Context)
Citation Context ...derlies the work described here, but knowledge of the details will not be needed. More elaborate type systems supporting `dependent types' and `subtypes' are sometimes used for hardware specification =-=[15, 21]-=- and provide, at a cost, greater expressive power. However, simple types are adequate for the needs of this paper (though it is probable that some notational improvement would be possible if more soph... |

2 |
A Formal Definition of the Static Semantics of ELLA's Core', Report No 91024 Royal Signals and Radar Establishment
- Morison, Hill
- 1991
(Show Context)
Citation Context ... and has been driven by different project aims. This section compares the three hardware description languages, while Section 5 gives an overview of the projects. 3.1 Size and style of languages ELLA =-=[4, 29]-=- is not especially big for an industrial-strength language, but is considerably larger than the toy languages often used in research into formal methods and computer language semantics. The language i... |

1 |
Transe: An Experimental Transformation Assistant Software for Digital Circuit Design
- Durrieu, Kessaci, et al.
- 1992
(Show Context)
Citation Context ...descriptions from the start, so that compilers can be programmed in styles suitable for formal verification. Other projects on transformational design have constructed systems programmed from scratch =-=[5, 6]-=-. The advantage of building a system for transformational design on top of an LCF-style theorem prover like HOL [10], in which programs are represented by their logical meaning and transformations can... |

1 |
A Mechanised Definition of Silage in HOL
- Gordon
- 1992
(Show Context)
Citation Context ... HOL-Silage approach apart from the others is the emphasis on a formal account of the language definition itself. This section is partly based on material from the definition of the HOL-Silage subset =-=[8]-=- and its summary [9]. Section 8.1 introduces transformational design of Silage programs, the motivation for the HOL-Silage project. The language is introduced in Section 8.2 by way of the parity check... |

1 |
Dependent Types and Formal Synthesis', in Mechanized Reasoning and Hardware Design, edited by
- Hanna, Daeche
- 1992
(Show Context)
Citation Context ...derlies the work described here, but knowledge of the details will not be needed. More elaborate type systems supporting `dependent types' and `subtypes' are sometimes used for hardware specification =-=[15, 21]-=- and provide, at a cost, greater expressive power. However, simple types are adequate for the needs of this paper (though it is probable that some notational improvement would be possible if more soph... |

1 |
A Formal HDL and its Use in the FM9001 Verification', in Mechanized Reasoning and Hardware Design, edited by
- Brock
- 1992
(Show Context)
Citation Context ...escribed here aims to support the use of conventional hardware description languages (HDLs) within a general theoremproving environment. The approach taken is semantic embedding in higher order logic =-=[13, 19]-=-, and the theorem-proving infrastructure is provided by the HOL system [12]. Three languages are being investigated by separate teams: ELLA (by Boulton, Harrison and Herbert), Silage (by A. Gordon) an... |

1 |
Defining Control Flow from an Applicative Specification
- Lippens
- 1988
(Show Context)
Citation Context ... the same behaviour but have a better performance against a particular silicon compiler and architectural requirements. There are several reports of experience of transformational design using Silage =-=[22, 32, 35]-=-. At present the only way to check that the initial and tuned programs have the same behaviour is to use simulation. The goal of the HOL-Silage project is to obtain an interactive system that under th... |

1 |
User Manual for the S2C Silage to C Compiler
- Nachtergaele
- 1990
(Show Context)
Citation Context ...n 8.7ssummarizes the achievements so far, and points to future goals. 8.1 Transformational design The design process used in practice at IMEC is to develop a Silage program using a software simulator =-=[30]-=-, and then to synthesize for a particular architecture -- bit-serial or microcoded -- with one of the CATHEDRAL synthesis systems [23]. Silicon compilers such as CATHEDRAL can cope mechanically with a... |

1 |
FUNNEL: A CHDL with Formal Semantics ', preprint
- Stavridou, Eker, et al.
- 1991
(Show Context)
Citation Context ...g is the definition of semantics. The HDLs presented here do not have a fully defined formal semantics. The few HDLs which have been designed with semantics as the primary consideration (e.g., Funnel =-=[33]-=-) are not part of CAD environments, and are not yet used in practical applications. In defining a formal semantics for the HDLs, it may only be possible to give a semantics for a subset of the notatio... |

1 |
VLSI Design Methodologies for Application-Specific Cryptographic and Algebraic Systems
- Verbauwhede
- 1991
(Show Context)
Citation Context ... the same behaviour but have a better performance against a particular silicon compiler and architectural requirements. There are several reports of experience of transformational design using Silage =-=[22, 32, 35]-=-. At present the only way to check that the initial and tuned programs have the same behaviour is to use simulation. The goal of the HOL-Silage project is to obtain an interactive system that under th... |