Synthesis of software programs for embedded control applications

Synthesis of software programs for embedded control applications (1999)

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by Felice Balarin , Massimiliano Chiodo , Paolo Giusto , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Alberto Sangiovanni-Vincentelli , Ellen M. Sentovich , Kei Suzuki

Venue:	IEEE TRANS. CAD
Citations:	53 - 3 self

BibTeX

@ARTICLE{Balarin99synthesisof,
    author = {Felice Balarin and Massimiliano Chiodo and Paolo Giusto and Harry Hsieh and Attila Jurecska and Luciano Lavagno and Alberto Sangiovanni-Vincentelli and Ellen M. Sentovich and Kei Suzuki},
    title = {Synthesis of software programs for embedded control applications},
    journal = {IEEE TRANS. CAD},
    year = {1999},
    volume = {18},
    number = {6},
    pages = {834--849}
}

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Abstract

Software components for embedded reactive real-time applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient intermediate format for embedded system co-synthesis, between high-level specification languages and software or hardware implementations. We propose a software generation methodology that takes advantage of a restricted class of specifications and allows for tight control over the implementation cost. The methodology exploits several techniques from the domain of Boolean function optimization. We also describe how the simplified control/data-flow graph used as an intermediate representation can be used to accurately estimate the size and timing cost of the final executable code.

Citations

2605	Graph-based algorithms for Boolean function manipulation - Bryant - 1986
2570	Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment - Liu, Layland - 1973
452	Ptolemy: A framework for simulating and prototyping heterogeneous systems - Buck, Ha, et al. - 1994
386	Dynamic Variable Ordering for Ordered Binary Decision Diagrams - Rudell - 1993
379	Statemate: A Working Environment for the Development of Complex Reactive Systems - Harel, Lachover, et al. - 1990
371	Synchronous Programming of Reactive Systems - Halbwachs - 1993
356	SIS: A system for sequential circuit synthesis - Sentovich, Singh, et al. - 1992
343	The synchronous approach to reactive and realtime systems - Benveniste, Berry - 1991
312	Binary decision diagrams - Akers - 1978
152	HardwareSoftware Co-Design of Embedded Systems: The Polis Approach - Balarin, Chiodo, et al. - 1997
132	Logic verification using binary decision diagrams in a logic synthesis environment - Malik, Wang, et al. - 1988
88	editors. Code Generation for Embedded Processors - Marwedel, Goossens - 1995
77	The Constructive Semantics of Pure Esterel - Berry - 1996
72	High-level Synthesis of ASICs under Timing and and Synchronization Constraints - Ku, Micheli - 1992
66	High-Level VLSI Synthesis - Camposano, W - 1991
57	Fast functional simulation using branching programs,” ICCAD - Ashar, Malik - 1995
57	Constructive Analysis of Cyclic Circuits - Shiple, Berry, et al. - 1996
48	Fast discrete function evaluation using decision diagrams,” ICCAD’95 - McGeer, McMillan, et al. - 1995
42	Camposano: ‘The High-Level Synthesis of - McFarland, R - 1990
34	Silicon Compilation - Gajski - 1988
33	Constructing predictable real time systems - Halang, Stoyenko - 1991
32	A formal specification model for hardware/software codesign - Chiodo, Giusto, et al. - 1993
30	Program Implementation Schemes for Hardware-Software Systems - Gupta, Coelho, et al. - 1994
25	R.Reed, Telecommunications Systems Engineering using SDL - Saracco, Smith - 1989
22	Scheduling for reactive real-time systems - CHOU, WALKUP, et al. - 1994
19	Boolean Relations and the Incomplete Specification of Logic Networks - Brayton, Somenzi - 1989
18	Modified Branching Programs and Their Computational Power, volume 370 - Meinel - 1989
18	Timed shannon circuits: a power-efficient design style and synthesis tool - Lavagno - 1995
15	Fast hardware/software co-simulation for virtual prototyping and trade-off analysis - Passerone, Lavagno, et al. - 1997
12	Representation of switching functions by binary decision programs - LEE - 1959
12	The Princeton university behavioral synthesis system - Wolf, Takach, et al. - 1992
7	Schedule validation for embedded reactive real-time systems - Balarin, Sangiovanni-Vincentelli - 1997
6	Allocation algorithms based on path analysis - Bergamaschi, Camposano, et al. - 1992
6	Logic veri using binary decision diagrams in a logic synthesis environment - Malik, Wang, et al. - 1988
2	Fast hardware / software co-simulation for virtual prototyping and trade-off analysis, Design Automation Conference - Passerone, Lavagno, et al.
1	Allocation algorithms based on paths - Bergamaschi, Camposano, et al. - 1992
1	Real-time task level scheduling - Engels - 1995
1	Timed Shannon Circuits: A Power Ecient Design Style and Synthesis Tool - Lavagno, McGeer, et al. - 1995
1	An esterel to SHIFT compiler for a hardware/software codesign environment - Yee - 1994
1	The Constructive Semantics of Pure Esterel, submitted for publication; Available: FTP://www.inria.fr/meije/esterel/papers/ constructiveness.ps.gz - Berry
1	formal specification model for hardware/software codesign,” presented at Int. Workshop Hardware-Software Codesign - “A - 1993
1	Constructive analysis of cyclic circuits,” presented at - Shiple, Berry, et al. - 1996