## VLSI Implementations of Threshold Logic - A Comprehensive Survey (2003)

Venue: | IEEE TRANS. NEURAL NETWORKS |

Citations: | 18 - 5 self |

### BibTeX

@ARTICLE{Beiu03vlsiimplementations,

author = {Valeriu Beiu and Jose M. Quintana and Maria J. Avedillo},

title = {VLSI Implementations of Threshold Logic - A Comprehensive Survey},

journal = {IEEE TRANS. NEURAL NETWORKS},

year = {2003},

volume = {14},

number = {5},

pages = {1217--1243}

}

### Years of Citing Articles

### OpenURL

### Abstract

This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, including a plethora of solutions evolved from them), as well as many differential solutions. At the end, we will briefly mention other implementations, e.g., based on negative resistance devices and on single electron technologies.