Abstract

Although retargetability has been a major design concern for many compilers, retargetability is a vitally important issue for Digital Signal Processors(DSPs) because the architectural variations of DSPs are much wider than those of General-Purpose Processors (GPPs). This paper reports our preliminary study on a retargetable code generator, called the Very Portable Optimizer (VPO), that has been recently engineered to target DSPs. The compiler was originally implemented to target among GPPs, but thanks to its novel intermediate representation designed to support retargetability, it has been successfully retargeted at a commercial DSP within a relatively short period of time. This retargetable compiler study is at its early stage, so the code quality is still amenable to further improvement. However, our recent improvement on VPO helped us to achieve quite encouraging results when being compared with a production-quality, highly-customized, compiler. language code to be translated to efficient machine code. While DSP vendors supply high-level language compilers, their code quality is still less than acceptable since overheads of compilergenerated code are much higher than hand-crafted code. As indicated by many system designers, the lack of powerful compilers become the greatest stumbling block in the development of embedded systems today [10]. One important property that a powerful compiler for DSPs should have is retargetability. Although retargetability has been one of the major design concerns for most compilers, its importance could not be more emphasized for those targeting DSPs because DSP architectures and instruction sets vary widely. Ideally, retargetable compilers must be user-retargetable [3]. A typical user-retargetable compiler allows the user to retarget the processor simply by providing an architectural description. Changes to the compiler may be possible, but should be minimized so that the retargeting time can be roughly less than a month.

Citations