## First-order incremental block-based statistical timing analysis (2004)

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Venue: | In DAC |

Citations: | 126 - 4 self |

### BibTeX

@INPROCEEDINGS{Visweswariah04first-orderincremental,

author = {C. Visweswariah and K. Ravindran and K. Kalafala and S. G. Walker and S. Narayan},

title = {First-order incremental block-based statistical timing analysis},

booktitle = {In DAC},

year = {2004},

pages = {331--336}

}

### Years of Citing Articles

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### Abstract

Variability in digital integrated circuits makes timing verification an extremely challenging task. In this paper, a canonical first order delay model is proposed that takes into account both correlated and independent randomness. A novel linear-time block-based statistical timing algorithm is employed to propagate timing quantities like arrival times and required arrival times through the timing graph in this canonical form. At the end of the statistical timing, the sensitivities of all timing quantities to each of the sources of variation are available. Excessive sensitivities can then be targeted by manual or automatic optimization methods to improve the robustness of the design. The statistical timing analysis is incremental, and is therefore suitable for use in the inner loop of physical synthesis or other optimization programs. The second novel contribution of this paper is the computation of local and global criticality probabilities. For a very small cost in CPU time, the probability of each edge or node of the timing graph being critical is computed. These criticality probabilities provide additional useful diagnostics to synthesis, optimization, test generation and path enumeration programs. Numerical results are presented on industrial ASIC chips with over two million logic gates. 1.

### Citations

169 | Statistical timing analysis considering spatial correlations using a single pert-like traversal
- Chang, Sapatnekar
- 2003
(Show Context)
Citation Context ...n approximate block-based statistical timing analysis algorithm is described to reduce pessimism in worst-case static timing analysis. The concept of parameterized delay models is proposed. Recently, =-=[7, 8]-=- focus on handling spatial correlations due to intra-die variability. Unfortunately, all these efforts suffer from some weaknesses. First, they do not provide diagnostics that can be used by a human d... |

113 |
The greatest of a finite set of random variables
- Clark
- 2003
(Show Context)
Citation Context ... in (5) above, σA, σB and the correlation coefficient ρ can be computed in linear time. Now we seek to determine the distribution of max(A, B) and the tightness probabilities of A and B. We appeal to =-=[9, 10]-=- for analytic expressions to solve this problem. Define φ(x) ≡ 1 √ exp(− 2π x2 ) (6) 2 φ(x)dx (7) θ ≡ (σ 2 A + σ 2 B − 2ρσAσB) 1/2 . (8) Then, the probability that A is larger than B is tA = � � � Φ(y... |

102 | Statistical timing analysis for intra-die process variations with spatial correlations,” in ICCAD, p
- Agarwal, Blaauw, et al.
- 2005
(Show Context)
Citation Context ...n approximate block-based statistical timing analysis algorithm is described to reduce pessimism in worst-case static timing analysis. The concept of parameterized delay models is proposed. Recently, =-=[7, 8]-=- focus on handling spatial correlations due to intra-die variability. Unfortunately, all these efforts suffer from some weaknesses. First, they do not provide diagnostics that can be used by a human d... |

50 | Death, taxes and failing chips
- Visweswariah
- 2003
(Show Context)
Citation Context ...ce of the chip. Unfortunately, such a methodology may require an exponential number of timing runs as the number of independent and significant sources of variation increase. Further, as described in =-=[1]-=-, the analysis may be both pessimistic and risky at the same time. At corners that are timed, worst-case assumptions are made which are pessimistic, whereas, since it is intractable to analyze all pos... |

44 | Statistical timing for parametric yield prediction of digital integrated circuits
- Jess, Kalafala, et al.
(Show Context)
Citation Context ...er than (or dominates) Y . Given n random variables, the tightness probability of each is the probability that it is larger than all the others. Tightness probability is called binding probability in =-=[7, 8]-=-. The tightness probability of Y , TY is (1 − TX). Below we show how to compute the max of two timing quantities in canonical form and how to determine their tightness probabilities. Given two timing ... |

42 | Fast statistical timing analysis by probabilistic event propagation
- Liou, Cheng, et al.
(Show Context)
Citation Context ...second class of statistical timers, namely block-based statistical timers. This set of methods can be thought of as “breadth-first timing,” since the timing graph is visited in a levelized manner. In =-=[3]-=-, probability distributions are assumed to be trains of discrete impulses which are propagated through the timing graph. However, correlations both due to global dependencies on the sources of variati... |

39 | Statistical Delay Calculation, a Linear Time Method
- Berkelaar
- 1997
(Show Context)
Citation Context ...rete impulses which are propagated through the timing graph. However, correlations both due to global dependencies on the sources of variation and due to path-sharing are ignored, as is the case with =-=[4]-=-. In this same general framework, [5] describes how correlations due to reconvergent fanout can be taken into account, but not dependence on global sources of variation. In [6], an approximate block-b... |

27 |
Path-based statistical timing analysis considering inter-and intra-die correlations
- Agarwal, Blaauw, et al.
(Show Context)
Citation Context .... By scaling the sensitivity coefficients, we can assume that Xi and Ra are unit normal or Gaussian distributions N(0, 1). Not all timing quantities depend on all global sources of variation; in fact =-=[6]-=- suggests a method of modeling ACLV (Across-Chip Linewidth Variation) by having delays of gates and wires in physically different regions of the chip depend on different sets of random variables. In c... |

26 | Computation and Refinement of Statistical Bounds on Circuit Delay
- Agarwal
(Show Context)
Citation Context ...s which are propagated through the timing graph. However, correlations both due to global dependencies on the sources of variation and due to path-sharing are ignored. In this same general framework, =-=[4]-=- describes how correlations due to reconvergent fanout can be taken into account, but not dependence on global sources of variation. In [5], an approximate block-based statistical timing analysis algo... |

17 |
The moment-generating function of the minimum of bivariate normal random variables
- Cain
- 1994
(Show Context)
Citation Context ... in (5) above, σA, σB and the correlation coefficient ρ can be computed in linear time. Now we seek to determine the distribution of max(A, B) and the tightness probabilities of A and B. We appeal to =-=[9, 10]-=- for analytic expressions to solve this problem. Define φ(x) ≡ 1 √ exp(− 2π x2 ) (6) 2 φ(x)dx (7) θ ≡ (σ 2 A + σ 2 B − 2ρσAσB) 1/2 . (8) Then, the probability that A is larger than B is tA = � � � Φ(y... |

8 |
Ginneken, “Incremental timing analysis
- Abato, Drumm, et al.
- 1993
(Show Context)
Citation Context ... Third, path-based timing does not lend itself to incremental processing whereby the calling program makes a change to the circuit and the timer answers the timing query incrementally and efficiently =-=[2]-=-. Finally, path-based algorithms are good at taking into account global correlations, but do not handle independent randomness in individual delays. Doping effects and gate oxide imperfections are usu... |

6 |
Network timing analysis method which eliminates timing variations between signals traversing a common circuit path
- Hathaway, Alvarez, et al.
- 1997
(Show Context)
Citation Context ...fferent contexts, such as producing reports, providing diagnostics to the user or a synthesis program, listing paths for test purposes, listing paths for CPPR (Common Path Pessimism Removal) purposes =-=[13]-=-, and enumerating paths for analysis by a path-based statistical timer [8]. One straightforward manner of enumerating paths is by means of a breadth-first visiting of the nodes of an augmented graph a... |

4 |
Explicit computation of performance as a function of process variation
- Scheffer
- 2002
(Show Context)
Citation Context ...to path-sharing are ignored. In this same general framework, [4] describes how correlations due to reconvergent fanout can be taken into account, but not dependence on global sources of variation. In =-=[5]-=-, an approximate block-based statistical timing analysis algorithm is described to reduce pessimismsin worst-case static timing analysis. The concept of parameterized delay models is proposed. Unfortu... |

3 |
Dfm in synthesis,” research report
- Jess
- 2001
(Show Context)
Citation Context ...er than (or dominates) Y . Given n random variables, the tightness probability of each is the probability that it is larger than all the others. Tightness probability is called binding probability in =-=[7, 8]-=-. The tightness probability of Y , TY is (1 − TX). Below we show how to compute the max of two timing quantities in canonical form and how to determine their tightness probabilities. Given two timing ... |

3 |
System and method for statistical timing analysis of digital circuits,” Docket YOR9-2003-401
- Visweswariah
- 2003
(Show Context)
Citation Context ...equivalents, and by re-expressing the result in a canonical form after each operation, regular static timing can be carried out by a standard forward and backward propagation through the timing graph =-=[11]-=-. Early and late mode, separate rise and fall delays, sequential circuits and timing tests are therefore easily accommodated just as in traditional timing analysis. 5. CRITICALITY COMPUTATION The meth... |

3 |
System and method for incremental statistical timing analysis of digital circuits,” Docket YOR9-2003-403
- Visweswariah
- 2003
(Show Context)
Citation Context ... clock inactive tests), arbitrary timing assertions and timing adjusts anywhere in the timing graph, and clock overrides are supported as in EinsTimer. The timer works permanently in incremental mode =-=[14]-=-, even if a complete timing report is requested. Each timing assertion, gate delay, wire delay and timing test guard time must be modeled in canonical form, i.e., with a mean part, a dependence on glo... |

2 |
System and method for probabilistic criticality prediction of digital circuits,” Docket YOR9-2003-402
- Visweswariah
- 2003
(Show Context)
Citation Context ... 2. probability is leveraged to propagate arrival and required arrival times in a parametric canonical form. In this section, the use of tightness probabilities in computing criticality probabilities =-=[12]-=- is presented. One of the important outcomes of deterministic timing is the ability to find the most critical path. In the statistical domain, the concept of the most critical path is probabilistic. T... |