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Predictor-directed stream buffers (2000)
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| Venue: | In 33rd International Symposium on Microarchitecture |
| Citations: | 70 - 12 self |
BibTeX
@INPROCEEDINGS{Sherwood00predictor-directedstream,
author = {Timothy Sherwood and Suleyman Sair and Brad Calder},
title = {Predictor-directed stream buffers},
booktitle = {In 33rd International Symposium on Microarchitecture},
year = {2000},
pages = {42--53}
}
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Abstract
An effective method for reducing the effect of load latency in modern processors is data prefetching. One form of data prefetching, stream buffers, has been shown to be particularly effective due to its ’ ability to detect data streams and run ahead of them, prefetching as it goes. Unfortunately, in the past, the applicability of streaming was limited to stride intensive code. In this paper we propose Predictor-Directed Stream Buffers (PSB), a scheme in which the stream buffer follows an address prediction stream instead of a fixed stride. In addition, we examine using confidence techniques to guide the allocation and prioritization of stream buffers and their prefetch requests. Our results show for pointer-based applications that PSB provides a 30 % speedup on average over no prefetching, and provides an average 10 % speedup over using previously proposed stride-based stream buffers for pointer-intensive applications. 1
Keyphrases
predictor-directed stream buffer stream buffer stride-based stream buffer prefetch request pointer-based application data prefetching modern processor confidence technique fixed stride data stream load latency intensive code effective method address prediction stream pointer-intensive application
