Abstract

An instruction set serves as the interface between hardware and software in a computer system. In an application specific environment, the system per-formance can be improved by designing an instruction set that matches the characteristics of hardware and the application. We present a systematic approach to generate application-specific instruction sets so that software applications can be efficiently mapped to a given pipelined microarchitec-ture. The approach synthesizes instruction sets from application bench-marks, given a machine model, an objective function, and a set of design constraints. In addition, assembly code is generated to show how the benchmarks can be compiled with the synthesized instruction set. The problem of designing instruction sets is formulated as a modified schedul-ing problem. A binary tuple is proposed to model the semantics of instruc-tions and integrate the instruction formation process into the scheduling process. A simulated annealing scheme is used to solve for the schedules. Experiments have shown that the approach is capable of synthesizing pow-erful instructions for modern pipelined micro-processors, and running with reasonable time and a modest amount of memory for large applications.

Citations