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The Effect of Threshold Voltages on the Soft Error Rate (2004)
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| Venue: | 5th International Symposium on Quality Electronic Design |
| Citations: | 15 - 2 self |
BibTeX
@INPROCEEDINGS{Degalahal04theeffect,
author = {V. Degalahal and R. Ramanarayanan and N. Vijaykrishnan and Y. Xie and M. J. Irwin},
title = {The Effect of Threshold Voltages on the Soft Error Rate},
booktitle = {5th International Symposium on Quality Electronic Design},
year = {2004},
pages = {503--508}
}
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Abstract
Due to technology scaling, smaller devices and lower operating voltages, next generation circuits are highly susceptible to soft errors. Another important problem confronting silicon scaling is static power consumption. In this paper, we analyze the effect of increasing threshold voltage (widely used for reducing static power consumption) on the soft error rate (SER). We find that increasing threshold voltage improves SER of transmission gate based flip-flops, but can adversely affect the robustness of combinational logic due to the effect of higher threshold voltages on the attenuation of transient pulses. We also show that clever use of high V t can improve the robustness of 6T-SRAMs.
