Register Allocation with Instruction Scheduling: A New Approach

Register Allocation with Instruction Scheduling: A New Approach (1996)

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by Shlomit S. Pinter

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@MISC{Pinter96registerallocation,
    author = {Shlomit S. Pinter},
    title = {Register Allocation with Instruction Scheduling: A New Approach},
    year = {1996}
}

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Citations

598	Trace scheduling: A technique for global microcode compaction - Fisher - 1981
395	Register allocation and spilling via graph coloring - Chaitin - 1982
198	An efficient method of computing static single assignment form - Cytron, Ferrante, et al.
121	Global Instruction Scheduling for Superscalar Machines - Bernstein, Rodeh - 1991
112	S.S.: Efficient instruction scheduling for a pipelined architecture - Gibbons, Muchnick - 1986
103	Code scheduling and register allocation in large basic blocks - Goodman, Hsu - 1988
99	Integrated Register Allocation and Instruction Scheduling for RISCs - Bradlee, Eggers, et al. - 1991
74	Some experiments in local microcode compaction for horizontal machines - Davidson - 1981
68	Region scheduling: An approach for detecting and redistributing parallelism - Gupta, Sofia - 1990
36	Scheduling time-critical instructions on RISC machines - Palem, Simons - 1993
32	Instruction scheduling for the IBM RISC System/6000 processor - Warren - 1990
31	Uniform Parallelism Exploitation in Ordinary Programs - Nicolau - 1985
27	I.: Scheduling Expressions on a Pipelined Processor with a maximal Delay of One Cycle - Bernstein, Gertner - 1989
7	Advanced compiler technology for the RISC System/6000 architecture - O'Brien, Hay, et al. - 1990
3	Engineering a RISC compiler system - Chow, Himelstein, et al. - 1986
1	Postpass code optimization of pipline constraints - Hennessy, Gross - 1983
1	A Fortran compiler for the FPS-164 scienti#c computer - Touzeau - 1984
1	Register allocation with instruction scheduling 37 - Aho, Sethi, et al. - 1986