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A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme (2004) [8 citations — 0 self]

by Kostas Pagiamtzis ,  Ali Sheikholeslami
IEEE JOURNAL OF SOLID-STATE CIRCUITS
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Abstract:

This paper presents two techniques to reduce power consumption in content-addressable memories (CAMs). The first technique is to pipeline the search operation by breaking the match-lines into several segments. Since most stored words fail to match in their first segments, the search operation is discontinued for subsequent segments, hence reducing power. The second technique is to broadcast small-swing search data on less capacitive global search-lines, and only amplify this signal to full swing on a shorter local search-line. As few match-line segments are active, few local search-lines will be enabled, again saving power. We have employed the proposed schemes in a 1024 144-bit ternary CAM in 1.8-V 0.18-μm CMOS, illustrating an overall power reduction of 60% compared to a nonpipelined, nonhierarchical architecture. The ternary CAM achieves a 7-ns search cycle time at 2.89fJ/bit/search.

Citations

33 Low-Swing on-Chip signaling Techniques: Effectiveness and Robustness – Zhang, George, et al. - 2002
31 CoolCAMs: Power-efficient TCAMs for forwarding engines – Zane, Narlikar, et al.
24 Putting routing tables in silicon – Pei, Zukowski - 1992
18 Content-Addressable and Associative Memory: Alternatives to the Ubiquitous RAM – Chisvin, Duckworth - 1989
12 Power modeling and low-power design of content addressable memories – Hsiao, Wang, et al. - 2001
11 Y.Mori, A design for high-speed low-power CMOS fully parallel content addressable memory macros – Miyatake, Tanaka - 2001
10 Use of Selective Precharge for Low-Power Content-Addressable Memories – Zukowski, Wang - 1997
7 Pipelined match-lines and hierarchical search-lines for low-power content-addressable memories – Pagiamtzis, Sheikholeslami - 2003
5 S’98–M’99–SM’02) received the B.Sc. degree from Shiraz University – Sheikholeslami - 1994
4 A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories – Arsovski, Sheikholeslami - 2003
2 parallel 30-MHz, 2.5-Mb CAM – Somppi - 1998
2 200 MHz/200 MSPS 3.2 W at 1.5 V Vdd, 9.4 Mbits ternary CAM with new charge injection match detect circuits and bank selection scheme – Kasai, Takarabe, et al.
1 spent 16 months as a student intern with the Memory Development Group, Nortel Networks, in 1998. He held a summer internship in 1999 at SiberCore Technologies – He
1 received the Teaching Assistant of the Year Award in 2002 and in 2003 by popular vote of the undergraduate students in the – Pagiamtzis
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