DMCA
Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures
BibTeX
@MISC{Sachdev_understandingthe,
author = {Eep S. Sachdev and Kshitij Sudan and Mary W. Hall and Rajeev Balasubramonian},
title = {Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures},
year = {}
}
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Abstract
Future scalable multi-core chips are expected to implement a shared last-level cache (LLC) with banks distributed on chip, forcing a core to incur non-uniform access latencies to each bank. Consequently, high performance and energy efficiency depend on whether a thread’s data is placed in local or nearby banks. Using compiler and programmer support, we aim to find an alternative solution to existing high-overhead designs. In this paper, we take existing parallel programs written in Pthreads, and show the performance gap between current static mapping schemes, costly migration schemes and idealized static and dynamic best-case scenarios. Keywords-Data locality; static-NUCA; Performance; I.
Keyphrases
non-uniform cache architecture pthread application dynamic best-case scenario high-overhead design alternative solution high performance current static mapping scheme costly migration scheme nearby bank future scalable multi-core chip keywords-data locality programmer support non-uniform access latency parallel program thread data performance gap energy efficiency last-level cache
