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A GPGPU Compiler for Memory Optimization and Parallelism Management (2010)
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| Venue: | In Proceedings of PLDI |
| Citations: | 53 - 4 self |
BibTeX
@INPROCEEDINGS{Yang10agpgpu,
author = {Yi Yang and Ping Xiang and Jingfei Kong and Huiyang Zhou},
title = {A GPGPU Compiler for Memory Optimization and Parallelism Management},
booktitle = {In Proceedings of PLDI},
year = {2010}
}
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Abstract
This paper presents a novel optimizing compiler for general purpose computation on graphics processing units (GPGPU). It addresses two major challenges of developing high performance GPGPU programs: effective utilization of GPU memory hierarchy and judicious management of parallelism. The input to our compiler is a naïve GPU kernel function, which is functionally correct but without any consideration for performance optimization. The compiler analyzes the code, identifies its memory access patterns, and generates both the optimized kernel and the kernel invocation parameters. Our optimization process includes vectorization and memory coalescing for memory bandwidth enhancement, tiling and unrolling for data reuse and parallelism management, and thread block remapping or addressoffset insertion for partition-camping elimination. The experiments on a set of scientific and media processing algorithms show that our optimized code achieves very high performance, either superior or very close to the highly fine-tuned library, NVIDIA CUBLAS 2.2, and up to 128 times speedups over the naive versions. Another distinguishing feature of our compiler is the understandability of the optimized code, which is useful for performance analysis and algorithm refinement.
Keyphrases
parallelism management memory optimization gpgpu compiler optimized code kernel invocation parameter na ve gpu kernel function data reuse performance analysis memory access pattern high performance gpgpu program algorithm show memory bandwidth enhancement novel optimizing compiler algorithm refinement optimization process memory coalescing nvidia cublas high performance effective utilization performance optimization partition-camping elimination thread block remapping major challenge fine-tuned library general purpose computation naive version gpu memory hierarchy judicious management
