An Effective Congestion Driven Placement Framework (2002)

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by Ulrich Brenner , Andre Rohe
Venue:ISPD
Citations:47 - 0 self

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Scalable Partitioning-Driven . . . – Navaratnasothie Selvakkumaran - 2005
7 An ILP based hierarchical global routing approach for VLSI ASIC design – Zhen Yang, Anthony Vannelli, Shawki Areibi - 2007
Implicit Heuristics to Mitigate Interconnect Congestion in a Multilevel Placement Framework – Navaratnasothie Selvakkumaran, Phiroze Parakh, Abhishek Ranjan, George Karypis, Navaratnasothie Selvakkumaran, Phiroze Parakh, Abhishek Ranjan, George Karypis - 2004
ABSTRACT AREA/CONGESTION-DRIVEN PLACEMENT FOR VLSI – Zhen Yang, Zhen Yang - 2003
5 Large-scale circuit placement: Gap and promise – Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie, Xin Yuan
3 Congestion Reduction during Placement with Provably Good Approximation Bound – Xiaojian Yang, Maogang Wang, Ryan Kastner, Soheil Ghiasi, Majid Sarrafzadeh - 2001
18 Multilevel Global Placement with Congestion Control – Chin-chih Chang, Jason Cong, Zhigang Pan, Xin Yuan, Student Member - 2003
17 Large-Scale Circuit Placement – Jason Cong, Joseph R. Shinnerl, Min Xie, Tim Kong, Xin Yuan - 2005
42 Routability Driven White Space Allocation for Fixed-Die Standard-Cell Placement – Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh - 2002