An Exact Solution to the Transistor Sizing Problem for CMOS Circuits Using Convex Optimization (1993)

Cached

Download Links

by Sachin S. Sapatnekar , Vasant B. Rao , Pravin M. Vaidya , Sung-mo Kang
Venue:IEEE Transactions on Computer-Aided Design
Citations:91 - 19 self

Active Bibliography

5 Modeling and Optimization of VLSI Interconnects – Lei He - 1999
103 Performance optimization of VLSI interconnect layout – Jason Cong, Lei He, Cheng-kok Koh, Patrick H. Madden - 1996
17 Timing and Area Optimization for Standard-Cell VLSI Circuit Design – Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj - 1995
19 Transistor Sizing for Minimizing Power Consumption of CMOS Circuits under Delay Constraint – Manjit Borah, Robert Michael Owens, Mary Jane Irwin - 1995
14 Wire Sizing as a Convex Optimization Problem: Exploring the Area-Delay Tradeoff – Sachin S. Sapatnekar - 1996
2 Optimal Design of Macrocells for Low Power and High Speed – Piyush K. Sancheti, Sachin S. Sapatnekar - 1996
9 Power vs. Delay in Gate Sizing: Conflicting Objectives? – Sachin S. Sapatnekar, Weitong Chuang - 1995
8 Power-Delay Optimizations in Gate Sizing – Sachin S. Sapatnekar, Weitong Chuang - 2000
29 New Algorithms for Gate Sizing: A Comparative Study – Olivier Coudert, Ramsey Haddad, Srilatha Manne - 1996
16 Optimizing dominant time constant in RC circuits – Lieven Vandenberghe, Stephen Boyd, Abbas El Gamal - 1996
6 Interconnect Design Using Convex Optimization – Piyush K. Sancheti, Sachin S. Sapatnekar - 1994
5 Mixed Swing Techniques for Low Energy/Operation Datapath Circuits – Ram Kumar Krishnamurthy - 1997
1 Sakallah, ÔÇťOptimization of critical paths in circuits withlevel-sensitive latches – Timothy M. Burks, Karem A. Sakallah - 1994
1 Macro-Driven Circuit Design Methodology for High-Performance Datapaths – Mahadevamurty Nemani, Vivek Tiwari - 2000
Novel Modeling and Optimization Techniques for Nano-Scale VLSI Designs – Sanghamitra Roy - 2008
12 Speeding up Pipelined Circuits through a Combination of Gate Sizing and Clock Skew Optimization – Harsha Sathyamurthy, Sachin S. Sapatnekar, John P. Fishburn - 1995
51 Optimal design of a CMOS op-amp via geometric programming – Maria Del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee - 2001
1 Simultaneous Allocation And Scheduling Using Convex Programming Techniques – Shankar Ramaswamy, Prithviraj Banerjee - 1995
7 Theory and Algorithm of Local-Refinement Based Optimization with Application to Device and Interconnect Sizing – Jason Cong, Lei He - 1999